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  • BQ25150 I2C Controlled 1-Cell 500-mA Linear Charger with 10-nA Ship Mode, Advanced Power Path Management and Control, ADC, and LDO

    • SLUSD04C july   2018  – april 2023 BQ25150

      PRODUCTION DATA  

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  • BQ25150 I2C Controlled 1-Cell 500-mA Linear Charger with 10-nA Ship Mode, Advanced Power Path Management and Control, ADC, and LDO
  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Key Default Settings
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Linear Charger and Power Path
        1. 9.3.1.1 Battery Charging Process
          1. 9.3.1.1.1 Pre-Charge
          2. 9.3.1.1.2 Fast Charge
          3. 9.3.1.1.3 Pre-Charge to Fast Charge Transitions and Charge Current Ramping
          4. 9.3.1.1.4 Termination
        2. 9.3.1.2 JEITA and Battery Temperature Dependent Charging
        3. 9.3.1.3 Input Voltage Based Dynamic Power Management (VINDPM) and Dynamic Power Path Management (DPPM)
        4. 9.3.1.4 Battery Supplement Mode
      2. 9.3.2  Protection Mechanisms
        1. 9.3.2.1 Input Over-Voltage Protection
        2. 9.3.2.2 Safety Timer and I2C Watchdog Timer
        3. 9.3.2.3 Thermal Protection and Thermal Charge Current Foldback
        4. 9.3.2.4 Battery Short and Over Current Protection
        5. 9.3.2.5 PMID Short Circuit
        6. 9.3.2.6 Maximum Allowable Charging Current (IMAX)
      3. 9.3.3  ADC
        1. 9.3.3.1 ADC Operation in Active Battery Mode and Low Power Mode
        2. 9.3.3.2 ADC Operation When VIN Present
        3. 9.3.3.3 ADC Measurements
        4. 9.3.3.4 ADC Programmable Comparators
      4. 9.3.4  VDD LDO
      5. 9.3.5  Load Switch / LDO Output and Control
      6. 9.3.6  PMID Power Control
      7. 9.3.7  MR Wake and Reset Input
        1. 9.3.7.1 MR Wake or Short Button Press Functions
        2. 9.3.7.2 MR Reset or Long Button Press Functions
      8. 9.3.8  14-Second Watchdog for HW Reset
      9. 9.3.9  Faults Conditions and Interrupts ( INT)
        1. 9.3.9.1 Flags and Fault Condition Response
      10. 9.3.10 Power Good ( PG) Pin
      11. 9.3.11 External NTC Monitoring (TS)
        1. 9.3.11.1 TS Thresholds
      12. 9.3.12 External NTC Monitoring (ADCIN)
      13. 9.3.13 I2C Interface
        1. 9.3.13.1 F/S Mode Protocol
    4. 9.4 Device Functional Modes
      1. 9.4.1 Ship Mode
      2. 9.4.2 Low Power
      3. 9.4.3 Active Battery
      4. 9.4.4 Charger/Adapter Mode
      5. 9.4.5 Power-Up/Down Sequencing
    5. 9.5 Register Map
      1. 9.5.1 I2C Registers
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Input (IN/PMID) Capacitors
        2. 10.2.2.2 VDD, LDO Input and Output Capacitors
        3. 10.2.2.3 TS
        4. 10.2.2.4 IMAX Selection
        5. 10.2.2.5 Recommended Passive Components
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Support Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information
  15. IMPORTANT NOTICE
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DATA SHEET

BQ25150 I2C Controlled 1-Cell 500-mA Linear Charger with 10-nA Ship Mode, Advanced Power Path Management and Control, ADC, and LDO

1 Features

  • Linear battery charger with 1.25-mA to 500-mA fast charge current range
    • 0.5% Accurate I2C programmable battery regulation voltage ranging from 3.6 V to 4.6 V in 10-mV steps
    • Configurable termination current supporting down to 0.5 mA
    • 20-V Tolerant input with typical 3.4-V to 5.5-V input voltage operating range
    • Programmable thermal charging profile, fully configurable hot, warm, cool and cold thresholds
  • Power path management for powering system and charging battery
    • Dynamic power path management optimizes charging from weak adapters
    • Advanced I2C control allows host to disconnect the battery or adapter as needed
  • I2C Configurable load switch or up to 150-mA LDO output
    • Programmable range from 0.6 V to 3.7 V in 100-mV steps
  • Ultra low Iddq for extended battery life
    • 10-nA Ship mode battery Iq
    • 400-nA Iq While powering the system (PMID and VDD on)
  • One push-button wake-up and reset input with adjustable timers
    • Supports system power cycle and HW reset
  • 16-Bit ADC
    • Monitoring of charge current, battery thermistor and battery, input and system (PMID) voltages
    • General purpose ADC input
  • Always on 1.8-V VDD LDO supporting loads up to 10 mA
  • 20-Pin 2-mm x 1.6-mm CSP package
  • 12-mm2 Total solution size

2 Applications

  • Headsets, earbuds and hearing aids
  • Smart watches and fitness accessories
  • Patient monitors and portable medical equipment

3 Description

The BQ25150 is a highly integrated battery charge management IC that integrates the most common functions for wearable devices, namely a charger, an output voltage rail, ADC for battery and system monitoring, and push-button controller.

Device Information
PART NUMBER (1) PACKAGE BODY SIZE (NOM)
BQ25150 DSBGA (20) 2.00 mm x 1.60 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
GUID-831EF43C-DE8F-4131-ABE7-24B322D735A6-low.gif Simplified Schematic
GUID-4B6791F8-81B9-408C-BFBE-F4855FBEA622-low.gif Solution Area

4 Revision History

Changes from Revision B (February 2019) to Revision C (April 2023)

  • Changed title descriptionGo
  • Added Key Device Default Settings Table.Go
  • Added clarification to LP pin description.Go
  • Added clarification to ADCIN pin description.Go
  • Changed maximum recommended PMID output current.Go
  • Changed maximum RON(BAT-PMID) in Electrical Characteristics.Go
  • Changed tHW_RESET_WD test conditions and MAX valueGo
  • Changed tRESET_WARN and tHW_RESET parametersGo
  • Changed Input Voltage Based Dynamic Power Management (VINDPM) and Dynamic Power Path Management (DPPM)section to simplify descriptionGo
  • Added clarification to ADC functionality when VIN is present.Go
  • Added clarification to ADC %ICHARGE readingGo
  • Added more details to the ADC Programmable Comparator description.Go
  • Deleted incorrect reference to LS_CTRL pin and updated descriptionGo
  • Added clarification on LDO voltage programmabilityGo
  • Updated Figure 9-3 Go
  • Changed tHW_RESET_WARN to tRESET_WARN and VIN presence to valid VIN presence in Section 9.3.7.2 Go
  • Added clarification to TS biasing operationGo
  • Deleted as well from Section 9.4.1 descriptionGo
  • Added link to BQ25150 Setup Guide and Setup Guide ToolGo
  • Changed registers 0x42 to 0x4F from R/W-X to R-X and R/W to R for typeGo
  • Changed IBAT_OCP_ILIM 2b10 setting description from 1500 mA to DisabledGo
  • Added clarification to TS_EN bit functionalityGo
  • Changed from TS to ground to from IMAX to ground in Section 10.2.2.3 Go
  • Added TS Biasing FigureGo
  • Added VINLS bypass capacitor layout guidelineGo

Changes from Revision A (October 2018) to Revision B (February 2019)

  • Deleted 12-Bit from title Go
  • Changed from Restricted to PublicGo
  • Changed ADC reported resolution TYP value from 12 to 16 Go
  • Changed TSHUTDOWN TYP value from 115°C to 125°C Go
  • Changed PUSHBUTTON TIMERS (/MR) number of decimal points in MIN/MAX from 3 to 2Go
  • Deleted tDGL_SC parameterGo
  • Deleted tLP_ENTRY parameter Go
  • Changed default state description for watchdog in Section 9.3.2.2 Go
  • Deleted 12-Bit from Section 9.3.3 Go
  • Changed LS/LDO1 to VLSLDO in Section 9.3.5 Go
  • Added Section 9.3.8 Go
  • Changed THERM_REG_2:0 reset value in #GUID-EDB5D2AD-4BE8-439B-8CA5-AC408605368B/I2C_I2C_CHARGERCTRL1 Go
  • Changed 1_ADCALARM_ABOVE in Table 9-51 Go
  • Changed 2_ADCALARM_ABOVE in Table 9-53 Go
  • Changed 3_ADCALARM_ABOVE in Table 9-55 Go

Changes from Revision * (July 2018) to Revision A (October 2018)

  • Changed from Advance Information to Production Data Go

 
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