8.2.2.7 Calculation of Compensation Network

UCC28780 integrates two control concepts to benefit high-efficiency operation: peak current-mode control and burst ripple control. The peak current loop in AAM can be analyzed based on the linear control theory, so the compensation target is to obtain enough phase margin and gain margin for the given small-signal characteristic of an active clamp flyback converter. For transition-mode operation, the power stage can be modeled as a voltage-controlled current source charging an output capacitor (C_O) with an equivalent-series resistance (R_Co) and the output load (R_O) as shown in Figure 37. The first-order plant characteristic and high switching frequency operation in AAM make the peak current loop easier to stabilize than ABM.

The adaptive burst mode (ABM) is a ripple-based control, so the linear control theory for AAM cannot be applied. The most critical stability criterion of burst control is to make the burst ripple content of I_FB to be in-phase with the burst ripple voltage of V_O. In normal operation, the fundamental burst frequency (f_BUR) in ABM varies between 20 kHz and 40 kHz. An example of normal burst operation is illustrated in Figure 38.

Strong phase-delay in the frequency range creates slope distortion around the intersection point between I_FB and I_TH(FB), so the ripple regulator generates inconsistent burst off-times. As shown in Figure 39, the sub-harmonic oscillation at half of f_BUR is a typical phenomenon of an unstable ABM loop. Two burst packets are adjacent to each other and the pulse count (N_SW) is different by one pulse count.

In order to minimize the phase-delay of I_FB, the transfer function from I_FB to V_O guides the pole/zero placement of the secondary-side passive ripple compensation network in Figure 40. In the primary-side control circuitry, two poles at ω_FB and ω_OPTO introduce phase-delay on I_FB. ω_FB pole is formed by the external filter capacitor C_FB and the parallel resistance of the internal R_FBI and the external current-limiting resistor (R_FB). ω_OPTO pole is formed by the parasitic capacitance of the optocoupler output (C_OPTO) and the series resistance of R_FBI and R_FB. For C_FB = 100 pF, R_FBI = 8 KΩ, and R_FB = 20 KΩ, the delay effect of ω_FB pole located at 278 kHz is negligible. However, ω_OPTO pole is located less than 10 kHz, and introduces large phase delay in the interested f_BUR range of ABM, since C_OPTO is in a few nF range contributed by the Miller effect of the collector-to-base capacitance of the BJT in the optocoupler output. Therefore, an RC network (R_DIFF and C_DIFF) in parallel with R_BIAS1 is used to compensate the phase-delay of the optocoupler, which introduces an extra pole/zero pair located at ω_P1 and ω_Z1 respectively. The basic design guide is to place the ω_Z1 zero close to the ω_OPTO pole, and to place ω_P1 pole away from highest f_BUR.

Another guideline of obtaining a more consistent burst off-time is to maintain large enough ripple amplitude of I_FB in ABM mode (ΔI_FB) for better signal-to-noise ratio. Figure 41 shows that when the noise floor alters the intersection point of each burst cycle, larger ΔI_FB performs much less burst off-time variation if the noise floor stays the same. ΔI_FB around 10 μA is a recommended initial design value. The ripple ratio (K_RIPPLE) between ΔI_FB and the burst voltage ripple of V_O in ABM (ΔV_O(ABM)) is obtained by simplifying the small-signal gain of I_FB(s)/V_O(s) transfer function between 20 kHz and 40 kHz.

With the above understanding on burst control, the step-by-step design procedure is:

1. R_FB selection needs to consider both the output voltage regulation and compensation challenge on the low-frequency pole at ω_OPTO. R_FB should be less than the maximum value of 28 kΩ to provide a sufficient feedback current of 95 μA for the output voltage regulation in SBP mode, under the worst-case V_FB(REG) and R_FBI. R_FB = 28 kΩ and C_OPTO = 2 nF result in the ω_OPTO pole located at 2.8 kHz. Such a low-frequency pole forces the ω_Z1 zero to be designed around 2.8 kHz to compensate the phase-delay.
Equation 52.
2. R_BIAS1 is determined based on a given current transfer ratio (CTR) of the optocoupler, ΔV_O(ABM), and target 10 μA of ΔI_FB as example.
Equation 53.
3. C_DIFF is designed to position ω_Z1 ≈ ω_OPTO and locate ω_P1 at least two-times higher frequency than 2π x f_BUR(UP) as example.
Equation 54.
4. R_DIFF is designed to position ω_P1 two-times higher than 2π x f_BUR(UP), but lower than the switching frequency in ABM (2π x f_SW(BUR)). Too small of R_DIFF moves ω_P1 higher than 2π x f_SW(BUR), so the high differentiation gain on the secondary-side compensator amplifies the switching ripple and increases the noise floor. Therefore, R_DIFF should be fine-tuned based on the actual noise level of a given design.
Equation 55.
5. R_INT selection is not designed for the small-signal compensation, but to resolve the slow large-signal response of the shunt regulator. Specifically, after a step-down load change from heavy load to no load occurs, the output voltage overshoot and the long settling time forces ATL431 to reduce the cathode voltage continuously by the integrator configuration of ATL431 until the output voltage gets back to normal regulation level. If the load step-up transient happens before the output voltage is settled from the previous load step-down event, the low voltage across ATL431 becomes the initial voltage level for the integrator to move to a new steady-state. Since the time for ATL431 moving from lower voltage to a high voltage delays i_FB reduction, the controller response from SBP mode to AAM mode is delayed as well, which slows down the energy delivery to the output and results in a large voltage undershoot. To resolve this problem, R_INT behaves like a current-limiting resistor for C_INT, which slows down the reduction on the cathode voltage of ATL431. R_INT needs to be adjusted based on the voltage undershoot requirement under the lowest repetitive rate of load change.