SLUSD66D September 2019 – February 2021 TPS92520-Q1
PRODUCTION DATA
The control registers are used to enable sleep mode and program the temperature warning threshold, LED current, and PWM duty cycle set points. The registers are read- and write-capable.
Address | Acronym | Register Name | Section |
---|---|---|---|
0x06 | TWLMT[9:2] | Thermal Warning Limit | Section 7.6.3.1 |
0x07 | SLEEP | Sleep Command Register | Section 7.6.3.2 |
0x08 | CH1IADJL | Channel 1 Analog Current Control Register (LSB) | Section 7.6.3.3 |
0x09 | CH1IADJH | Channel 1 Analog Current Control Register (MSB) | Section 7.6.3.4 |
0x0A | CH2IADJL | Channel 2 Analog Current Control Register (LSB) | Section 7.6.3.5 |
0x0B | CH2IADJH | Channel 2 Analog Current Control Register (MSB) | Section 7.6.3.6 |
0x0C | PWMDIV | Internal PWM Clock Divider Register | Section 7.6.3.7 |
0x0D | CH1PWML | Channel 1 PWM Width Register (LSB) | Section 7.6.3.8 |
0x0E | CH1PWMH | Channel 1 PWM Width Register (MSB) | Section 7.6.3.9 |
0x0F | CH2PWML | Channel 2 PWM Width Register (LSB) | Section 7.6.3.10 |
0x10 | CH2PWMH | Channel 2 PWM Width Register (MSB) | Section 7.6.3.11 |
0x11 | CH1TON | Channel 1 On-Time Register | Section 7.6.3.12 |
0x12 | CH2TON | Channel 2 On-Time Register | Section 7.6.3.13 |