SLUSD66D September 2019 – February 2021 TPS92520-Q1
PRODUCTION DATA
Figure 7-57 shows the LH1IADJH register. Table 7-50 describes the LH1IADJH register.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | ||||||||
LH1IADJ[9:2] | |||||||||||||||
R/W-00000000b |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7-0 | LH1IADJ[9:2] | R/W | 00000000 | Channel 1 analog current control in limp-home mode. The 8 MSBs of the 10-bit IADJ DAC for channel 1 can be programmed by writing to the register. |