SLUSD71A April   2018  – May 2018 UCC28742

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Schematic
      2.      Typical Efficiency of a 10-W, 5-V AC-to-DC Converter
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Detailed Pin Description
        1. 7.3.1.1 VDD (Device Bias Voltage Supply)
        2. 7.3.1.2 GND (Ground)
        3. 7.3.1.3 VS (Voltage-Sense)
        4. 7.3.1.4 DRV (Gate Drive)
        5. 7.3.1.5 CS (Current Sense)
        6. 7.3.1.6 FB (Feedback)
      2. 7.3.2 Secondary-Side Optically Coupled Constant-Voltage (CV) Regulation
      3. 7.3.3 Control Law
      4. 7.3.4 Constant Current Limit and Delayed Shutdown
      5. 7.3.5 Valley-Switching and Valley-Skipping
      6. 7.3.6 Start-Up Operation
      7. 7.3.7 Fault Protection
    4. 7.4 Device Functional Modes
  8. Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Custom Design With WEBENCH® Tools
        2. 8.2.2.2  VDD Capacitance, CDD
        3. 8.2.2.3  VDD Start-Up Resistance, RSTR
        4. 8.2.2.4  Input Bulk Capacitance and Minimum Bulk Voltage
        5. 8.2.2.5  Transformer Turns Ratio, Inductance, Primary-Peak Current
        6. 8.2.2.6  Transformer Parameter Verification
        7. 8.2.2.7  VS Resistor Divider and Line Compensation
        8. 8.2.2.8  Standby Power Estimate
        9. 8.2.2.9  Output Capacitance
        10. 8.2.2.10 Feedback Loop Design Consideration
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Custom Design With WEBENCH® Tools
      2. 11.1.2 Device Nomenclature
        1. 11.1.2.1  Capacitance Terms in Farads
        2. 11.1.2.2  Duty Cycle Terms
        3. 11.1.2.3  Frequency Terms in Hertz
        4. 11.1.2.4  Current Terms in Amperes
        5. 11.1.2.5  Current and Voltage Scaling Terms
        6. 11.1.2.6  Transformer Terms
        7. 11.1.2.7  Power Terms in Watts
        8. 11.1.2.8  Resistance Terms in Ω
        9. 11.1.2.9  Timing Terms in Seconds
        10. 11.1.2.10 Voltage Terms in Volts
        11. 11.1.2.11 AC Voltage Terms in VRMS
        12. 11.1.2.12 Efficiency Terms
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Feedback Loop Design Consideration

Refer to Figure 18, the UCC28742 converter feedback network is composed of TL431, optocoupler and several resistors and capacitors. RFB1 and RFB2 set up the converter output regulation point. A series-resistor RFB3 is necessary to limit the current into FB and to avoid excess draining of CVDD during this type of transient situation, although connecting the emitter directly to the FB input of the UCC28742 is possible. However, an unload-step response may unavoidably drive the optocoupler into saturation which will overload the FB input with full VDD applied. The value of RFB3 is to limit the excess IFB to an acceptable level when the optocoupler is saturated. The RFB3 value is chosen to allow the current into the FB pin to reach the 30 µA. the maximum IFB control level. This will be met if the voltage at IFB can reach 1V at no load conditions. To improve transient response RFB3 can be bypassed with CFB3.

RFB4 can be used to set a nominal operating current of the optocoupler to improve the current transfer ratio and bandwidth of the optocoupler. For low standby power this operating current level should be kept small since it must be supplied from VDD operating voltage. The value of RFB4 is determined empirically due to the variable nature of the specific optocoupler chosen for the design. The ratio of RFB4 to RFB3 is typically in a range of 1/10 to 1/4 with typical value of RFB4 in 4 kΩ to 25 kΩ, and RFB3 in 25 kΩ to 200 kΩ. A good starting point is to select RFB4 around 4 kΩ and RFB3 around 30 kΩ for a design.

The shunt-regulator compensation network, ZFB, is determined using well-established design techniques for control-loop stability. Typically, a Type-II compensation network is used. An effective approach is to set ZFB to be a capacitor, ZFB = CFB to form an integrator, and adding a bypass capacitor RFB3 will extend the frequency response of the optocoupler CTR.

Referring again to Figure 18, the shunt-regulator (typically a TL431) current is at about 1 mA even when almost no optocoupler diode current flows. Since even a near-zero diode current establishes a forward voltage, ROPT is selected to provide regulator bias current such as for TL431. The optocoupler input diode must be characterized by the designer to obtain the actual forward voltage versus forward current at the low currents expected. At the full-load condition of the converter, IFB is around 0.5 µA, ICE may be around (0.4 V / RFB4), and CTR at this level is about 10%, so the diode current typically falls in the range of 25 µA to 100 µA. Typical opto-diode forward voltage at this level is about 0.97 V which is applied across ROPT. If ROPT is set equal to 1 kΩ, this provides 970 µA plus the diode current for IOPT.

As output load decreases, the voltage across the shunt-regulator also decreases to increase the current through the optocoupler diode. This increases the diode forward voltage across ROPT. CTR at no-load (when ICE is higher) is generally a few percent higher than CTR at full-load (when ICE is lower). At steady-state no-load condition, the shunt-regulator current is maximized and can be estimated by and Equation 31. IOPTNL, plus the sum of the leakage currents of all the components on the output of the converter, constitute the total current required for use in to estimate secondary-side standby loss.

Equation 31. UCC28742 qu31_q_Ioptnl_lusbf3.gif

The shunt-regulator voltage can decrease to a minimum, saturated level of about 2 V. To prevent excessive diode current, a series resistor, RTL, is added to limit IOPT to the maximum value necessary for regulation. Equation 32 provides an estimated initial value for RTL, which may be adjusted for optimal limiting later during the prototype evaluation process.

Equation 32. UCC28742 qu32_q_Rtl_lusbf3.gif