SLUSDB2B
August 2018 – October 2024
UCC28950
,
UCC28951
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Timing Requirements
5.7
Dissipation Ratings
5.8
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Start-Up Protection Logic
6.3.2
Voltage Reference (VREF)
6.3.3
Error Amplifier (EA+, EA–, COMP)
6.3.4
Soft-Start and Enable (SS/EN)
6.3.5
Light-Load Power Saving Features
6.3.6
Adaptive Delay, (Delay Between OUTA and OUTB, OUTC and OUTD (DELAB, DELCD, ADEL))
6.3.7
Adaptive Delay (Delay Between OUTA and OUTF, OUTB and OUTE (DELEF, ADELEF)
6.3.8
Minimum Pulse (TMIN)
6.3.9
Burst Mode
6.3.10
Switching Frequency Setting
6.3.11
Slope Compensation (RSUM)
6.3.12
Dynamic SR ON/OFF Control (DCM Mode)
6.3.13
Current Sensing (CS)
6.3.14
Cycle-by-Cycle Current Limit Current Protection and Hiccup Mode
6.3.15
Synchronization (SYNC)
6.3.16
Outputs (OUTA, OUTB, OUTC, OUTD, OUTE, OUTF)
6.3.17
Supply Voltage (VDD)
6.3.18
Ground (GND)
6.4
Device Functional Modes
7
Application and Implementation
7.1
Application Information
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.2.1
Power Loss Budget
7.2.2.2
Preliminary Transformer Calculations (T1)
7.2.2.3
QA, QB, QC, QD FET Selection
7.2.2.4
Selecting LS
7.2.2.5
Selecting Diodes DB and DC
7.2.2.6
Output Inductor Selection (LOUT)
7.2.2.7
Output Capacitance (COUT)
7.2.2.8
Select FETs QE and QF
7.2.2.9
Input Capacitance (CIN)
7.2.2.10
Current Sense Network (CT, RCS, R7, DA)
7.2.2.10.1
Voltage Loop Compensation Recommendation
7.2.3
Application Curves
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Example
8
Device and Documentation Support
8.1
Device Support
8.1.1
Development Support
8.2
Documentation Support
8.2.1
Related Documentation
8.3
Receiving Notification of Documentation Updates
8.4
Community Resources
8.5
Trademarks
9
Revision History
10
Mechanical, Packaging, and Orderable Information
5.8
Typical Characteristics
Figure 5-3
UVLO Thresholds vs Temperature
Figure 5-5
Supply Current vs Temperature
Figure 5-7
Voltage Reference (VDD = 12V) vs Temperature
Figure 5-9
Short-Circuit Current vs Temperature
Figure 5-11
Nominal Switching Frequency vs Temperature
Figure 5-13
Error Amplifier Offset Voltage vs Temperature
Figure 5-15
I
SS
Charge Current vs Temperature
Figure 5-17
SS Pullup Threshold vs Temperature
Figure 5-19
Current Sense Cycle-by-Cycle Limit vs Temperature
Figure 5-21
Outputs Sink Resistance vs Temperature
Figure 5-23
Outputs Source Resistance vs Temperature
Figure 5-25
Dead Time Delay vs Temperature
Figure 5-27
DCM Threshold vs Temperature
Figure 5-4
UVLO Hysteresis vs Temperature
Figure 5-6
Start-Up Current vs Temperature
Figure 5-8
Line Voltage Regulation (I
LOAD
= 10mA) vs Temperature
Figure 5-10
Maximum Duty Cycle vs Temperature
Figure 5-12
Maximum Switching Frequency vs Temperature
Figure 5-14
Voltage Error Amplifier (Open-Loop Gain) vs Temperature
Figure 5-16
Shutdown, Restart, and Reset Threshold vs Temperature
Figure 5-18
SS Clamp Voltage vs Temperature
Figure 5-20
Current Sense Propagation Delay vs Temperature
Figure 5-22
Outputs Sink Resistance vs Temperature
Figure 5-24
Outputs Source Resistance vs Temperature
Figure 5-26
Dead Time Delay vs Temperature