SLUSDU3 May   2021 BQ25720

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Power-Up Sequence
      2. 9.3.2  Vmin Active Protection (VAP) with Battery only
      3. 9.3.3  Two-Level Battery Discharge Current Limit
      4. 9.3.4  Fast Role Swap Feature
      5. 9.3.5  CHRG_OK Indicator
      6. 9.3.6  Input and Charge Current Sensing
      7. 9.3.7  Input Voltage and Current Limit Setup
      8. 9.3.8  Battery Cell Configuration
      9. 9.3.9  Device HIZ State
      10. 9.3.10 USB On-The-Go (OTG)
      11. 9.3.11 Converter Operation
      12. 9.3.12 Inductance Detection Through IADPT Pin
      13. 9.3.13 Converter Compensation
      14. 9.3.14 Continuous Conduction Mode (CCM)
      15. 9.3.15 Pulse Frequency Modulation (PFM)
      16. 9.3.16 Switching Frequency and Dithering Feature
      17. 9.3.17 Current and Power Monitor
        1. 9.3.17.1 High-Accuracy Current Sense Amplifier (IADPT and IBAT)
        2. 9.3.17.2 High-Accuracy Power Sense Amplifier (PSYS)
      18. 9.3.18 Input Source Dynamic Power Management
      19. 9.3.19 Input Current Optimizer (ICO)
      20. 9.3.20 Two-Level Adapter Current Limit (Peak Power Mode)
      21. 9.3.21 Processor Hot Indication
        1. 9.3.21.1 PROCHOT During Low Power Mode
        2. 9.3.21.2 PROCHOT Status
      22. 9.3.22 Device Protection
        1. 9.3.22.1 Watchdog Timer
        2. 9.3.22.2 Input Overvoltage Protection (ACOV)
        3. 9.3.22.3 Input Overcurrent Protection (ACOC)
        4. 9.3.22.4 System Overvoltage Protection (SYSOVP)
        5. 9.3.22.5 Battery Overvoltage Protection (BATOVP)
        6. 9.3.22.6 Battery Discharge Overcurrent Protection (BATOC)
        7. 9.3.22.7 Battery Short Protection (BATSP)
        8. 9.3.22.8 System Undervoltage Lockout (VSYS_UVP) and Hiccup Mode
        9. 9.3.22.9 Thermal Shutdown (TSHUT)
    4. 9.4 Device Functional Modes
      1. 9.4.1 Forward Mode
        1. 9.4.1.1 System Voltage Regulation with Narrow VDC Architecture
        2. 9.4.1.2 Battery Charging
      2. 9.4.2 USB On-The-Go
      3. 9.4.3 Pass Through Mode (PTM)-Patented Technology
    5. 9.5 Programming
      1. 9.5.1 SMBus Interface
        1. 9.5.1.1 SMBus Write-Word and Read-Word Protocols
        2. 9.5.1.2 Timing Diagrams
    6. 9.6 Register Map
      1. 9.6.1  ChargeOption0 Register (SMBus address = 12h) [reset = E70Eh]
      2. 9.6.2  ChargeCurrent Register (SMBus address = 14h) [reset = 0000h]
        1. 9.6.2.1 Battery Pre-Charge Current Clamp
      3. 9.6.3  ChargeVoltage Register (SMBus address = 15h) [reset value based on CELL_BATPRESZ pin setting]
      4. 9.6.4  ChargerStatus Register (SMBus address = 20h) [reset = 0000h]
      5. 9.6.5  ProchotStatus Register (SMBus address = 21h) [reset = B800h]
      6. 9.6.6  IIN_DPM Register With 10-mΩ Sense Resistor (SMBus address = 22h) [reset = 4100h]
      7. 9.6.7  ADCVBUS/PSYS Register (SMBus address = 23h)
      8. 9.6.8  ADCIBAT Register (SMBus address = 24h)
      9. 9.6.9  ADCIINCMPIN Register (SMBus address = 25h)
      10. 9.6.10 ADCVSYSVBAT Register (SMBus address = 26h)
      11. 9.6.11 ChargeOption1 Register (SMBus address = 30h) [reset = 3300h]
      12. 9.6.12 ChargeOption2 Register (SMBus address = 31h) [reset = 00B7]
      13. 9.6.13 ChargeOption3 Register (SMBus address = 32h) [reset = 0434h]
      14. 9.6.14 ProchotOption0 Register (SMBus address = 33h) [reset = 4A81h(2S~) 4A09(1S)]
      15. 9.6.15 ProchotOption1 Register (SMBus address = 34h) [reset = 41A0h]
      16. 9.6.16 ADCOption Register (SMBus address = 35h) [reset = 2000h]
      17. 9.6.17 ChargeOption4 Register (SMBus address = 36h) [reset = 0048h]
      18. 9.6.18 Vmin Active Protection Register (SMBus address = 37h) [reset = 006Ch(2s~4s)/0004h(1s)]
      19. 9.6.19 OTGVoltage Register (SMBus address = 3Bh) [reset = 09C4h]
      20. 9.6.20 OTGCurrent Register (SMBus address = 3Ch) [reset = 3C00h]
      21. 9.6.21 InputVoltage (VINDPM) Register (SMBus address = 3Dh) [reset = VBUS-1.28V]
      22. 9.6.22 VSYS_MIN Register (SMBus address = 3Eh) [reset value based on CELL_BATPRESZ pin setting]
      23. 9.6.23 IIN_HOST Register (SMBus address = 3Fh) [reset = 4100h]
      24. 9.6.24 ID Registers
        1. 9.6.24.1 ManufactureID Register (SMBus address = FEh) [reset = 0040h]
        2. 9.6.24.2 Device ID (DeviceAddress) Register (SMBus address = FFh) [reset = 00E1h]
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 ACP-ACN Input Filter
        2. 10.2.2.2 Inductor Selection
        3. 10.2.2.3 Input Capacitor
        4. 10.2.2.4 Output Capacitor
        5. 10.2.2.5 Power MOSFETs Selection
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
      1. 12.2.1 Layout Example Reference Top View
      2. 12.2.2 Inner Layer Layout and Routing Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Support Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

8.7 Typical Characteristics

RAC = 5 mΩ, RSR = 5 mΩ, Inductance = 2.2 μH, CCM Frequency = 800 kHz
GUID-20210504-CA0I-TKMR-MGVX-GZVV0PT3HNNP-low.svg
VIN = 5 V CCM 800 kHz VOUT = System voltage
Figure 8-1 System Efficiency
GUID-20210504-CA0I-LLQZ-DXFW-X44PS7ZBFGDT-low.svg
VIN = 15 V CCM 800 kHz VOUT = System voltage
Figure 8-3 System Efficiency
GUID-20210504-CA0I-K8GS-HJFP-SBN8ZNLCLW5K-low.svg
VIN = 5 V EN_OOA = 0b VOUT = System voltage
Figure 8-5 Light Load System Efficiency
GUID-20210504-CA0I-9BXC-4KHJ-VLL345HBZNDC-low.svg
VIN = 20 V EN_OOA = 0b VOUT = System voltage
Figure 8-7 Light Load System Efficiency
GUID-20210504-CA0I-XHGC-DPGD-JTBXZ0GS29ZL-low.svg
VBAT = 8 V CCM 800 kHz
Figure 8-9 OTG Efficiency with 2S Battery
GUID-20210504-CA0I-4NRM-SWHS-W9G0NFBRJDBP-low.svg
VBAT = 16 V CCM 800 kHz
Figure 8-11 OTG Efficiency with 4S Battery
GUID-20210512-CA0I-FPMW-16DP-Q5TCXLNXP4VC-low.svg
VBAT = 8.4 V VOUT = VBUS
Figure 8-13 PTM Mode Heavy Load System Efficiency
GUID-20210512-CA0I-KKB4-MXJF-2M9LQRWHNBJQ-low.svg
ICHG = 1024 mA CCM 800 kHz IBUS = 100 mA
Figure 8-15 Input Voltage(VINDPM) Regulation Accuracy
GUID-20210504-CA0I-Z0NW-HJQZ-ZCQSGRJLQCGT-low.svg
VIN = 9 V CCM 800 kHz VOUT = System voltage
Figure 8-2 System Efficiency
GUID-20210504-CA0I-7JTP-XRP6-MCVWLM1GCPPK-low.svg
VIN = 20 V CCM 800 kHz VOUT = System voltage
Figure 8-4 System Efficiency
GUID-20210504-CA0I-CSMP-HQGS-90FKT2DBM6DP-low.svg
VIN = 12 V EN_OOA = 0b VOUT = System voltage
Figure 8-6 Light Load System Efficiency
GUID-20210504-CA0I-M5P3-FT7Q-QLSZCQ1QH49M-low.svg
VBAT = 4 V CCM 800 kHz
Figure 8-8 OTG Efficiency with 1S Battery
GUID-20210504-CA0I-PT74-42M6-F1R0SZXRPMQL-low.svg
VBAT = 12 V CCM 800 kHz
Figure 8-10 OTG Efficiency with 3S Battery
GUID-20210512-CA0I-VNSX-MKQK-JRFVGRZ4L13L-low.svg
VBAT = 8.4 V VOUT = VBUS
Figure 8-12 PTM Mode Ligh Load System Efficiency
GUID-20210513-CA0I-N4TJ-G9PT-9MGRM16HJFRS-low.svg
ICHG = 1024 mA CCM 800 kHz
Figure 8-14 Battery Voltage Regulation Accuracy
GUID-20210512-CA0I-TQZ2-HNC3-KJV8CKBXKN1S-low.svg
VBAT = 0.5 V CCM 800 kHz EN_OOA = 0b
Figure 8-16 Minimum System Voltage Regulation Accuracy