SLUSE80C September   2021  – December 2022 UCC14240-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Electrical Characteristics
    9. 6.9  Safety Limiting Values
    10. 6.10 Insulation Characteristics
    11. 6.11 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Stage Operation
        1. 7.3.1.1 VDD-VEE Voltage Regulation
        2. 7.3.1.2 COM-VEE Voltage Regulation
        3. 7.3.1.3 Power Handling Capability
      2. 7.3.2 Output Voltage Soft Start
      3. 7.3.3 ENA and PG
      4. 7.3.4 Protection Functions
        1. 7.3.4.1 Input Undervoltage Lockout
        2. 7.3.4.2 Input Overvoltage Lockout
        3. 7.3.4.3 Output Overvoltage Protection
        4. 7.3.4.4 Overpower Protection
          1. 7.3.4.4.1 Output Undervoltage Protection
        5. 7.3.4.5 Overtemperature Protection
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Capacitor Selection
        2. 8.2.2.2 RLIM Resistor Selection
      3. 8.2.3 Application Curves
    3. 8.3 System Examples
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

8.2.3 Application Curves

The PMP23223 is a reference design that pairs the complementary UCC14240-Q1 isolated DC/DC power module with the UCC21732-Q1 isolated gate driver for a SiC power MOSFET or IGBT power module. The following waveforms show the controlled soft start for both positive and negative rails. Also shown, is the fast and highly accurate voltage regulation during gate driver switching from 1 kHz to 35 kHz. See PMP23223 reference design test report for more details.

GUID-20220505-SS0I-CBW3-DS7N-76FHFCT21RKG-low.pngFigure 8-4 Power-Up Sequence.
GUID-20220505-SS0I-KQ3C-FQFJ-QVWSNTLDC0GJ-low.pngFigure 8-6 Ripple voltage: VDD-VEE Switching 100-nF Load at 1 kHz.
GUID-20220505-SS0I-SSPN-9GZ6-TFJSHTJFJNPD-low.pngFigure 8-8 Ripple voltage: VDD-VEE Switching 100-nF Load at 35 kHz.
GUID-20220505-SS0I-4P7K-55D4-P6PDQRF0JJ7M-low.pngFigure 8-10 Gate Waveform Switching 100 nF at 35kHz.
GUID-20220505-SS0I-WKZC-FNH4-FQ3HTPJSCHCR-low.pngFigure 8-5 Ripple voltage: VEE-COM Switching 100-nF Load at 1 kHz.
GUID-20220505-SS0I-66JQ-GZTQ-L3KPD1FLDBPR-low.pngFigure 8-7 Ripple voltage: VEE-COM Switching 100-nF Load at 35 kHz.
GUID-20220505-SS0I-RWGG-3HN4-D924GSSVCVCD-low.pngFigure 8-9 Gate Waveform Switching 100 nF at 1 kHz.