SLUSEE5D January   2022  – April 2024 TPS4811-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Charge Pump and Gate Driver output (VS, PU, PD, BST, SRC)
      2. 8.3.2  Capacitive Load Driving
        1. 8.3.2.1 FET Gate Slew Rate Control
        2. 8.3.2.2 Using Precharge FET - (with TPS48111-Q1 Only)
      3. 8.3.3  Short-Circuit Protection
        1. 8.3.3.1 Overcurrent Protection With Auto-Retry
        2. 8.3.3.2 Overcurrent Protection With Latch-Off
      4. 8.3.4  Short-Circuit Protection
      5. 8.3.5  Analog Current Monitor Output (IMON)
      6. 8.3.6  Overvoltage (OV) and Undervoltage Protection (UVLO)
      7. 8.3.7  Device Functional Mode (Shutdown Mode)
      8. 8.3.8  Remote Temperature sensing and Protection (DIODE)
      9. 8.3.9  Output Reverse Polarity Protection
      10. 8.3.10 TPS4811x-Q1 as a Simple Gate Driver
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application: Driving HVAC PTC Heater Load on KL40 Line in Power Distribution Unit
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Typical Application: Driving B2B FETs With Pre-charging the Output Capacitance
      1. 9.3.1 Design Requirements
      2. 9.3.2 External Component Selection
      3. 9.3.3 Application Curves
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

5 Pin Configuration and Functions

GUID-20220111-SS0I-PFXZ-XQJR-KBJ6P33FLTQ0-low.svgFigure 5-1 DGX Package,19-Pin VSSOP(Top View)
Table 5-1 Pin Functions
PINTYPEDESCRIPTION
NAMETPS48110-Q1TPS48111-Q1
DGX-19 (VSSOP)
EN/UVLO11IEN/UVLO input. A voltage on this pin above 1 V enables normal operation. Forcing this pin below 0.3 V shuts down the TPS4811x-Q1, reducing quiescent current to approximately 1.6 µA (typical). Optionally connect to the input supply through a resistive divider to set the undervoltage lockout. When EN/UVLO is left floating an internal pull down of 60 nA pulls EN/UVLO low and keeps the device in OFF state.
OV2—IAdjustable overvoltage threshold input. Connect a resistor ladder from input supply, OV to GND. When the voltage at OV exceeds the overvoltage cut-off threshold then the PD is pulled down to SRC turning OFF the external FET. When the voltage at OV goes below OV falling threshold then PU gets pulled up to BST, turning ON the external FET.
OV must be connected to GND when not used. When OV is left floating an internal pull down of 60 nA pulls OV low and keeps PU pulled up to BST.
INP_G—2IInput Signal. CMOS compatible input reference to GND that sets the state of G pin. INP_G has an internal pull-down to GND to keep G pulled to SRC when INP_G is left floating.

Connect INP_G to GND if the G drive functionality is unused.

INP33IInput Signal. CMOS compatible input reference to GND that sets the state of PD and PU pins. INP has an internal pull-down to GND to keep PD pulled to SRC when INP is left floating.
FLT_T44OOpen Drain Fault Output. This pin asserts low when overtemperature fault is detected.
FLT_I55OOpen Drain Fault Output. This pin asserts low after the voltage on the TMR pin has reached the fault threshold of 1.1 V. This pin indicates the pass transistor is about to turn off due to an overcurrent condition. The FLT_I pin does not go to a high-impedance state until the overcurrent condition and the auto-retry time expire.
GND66GConnect GND to system ground.
IMON77OAnalog current monitor output. This pin sources a scaled down ratio of current through the external current sense resistor RSNS. A resistor from this pin to GND converts current proportional to voltage. If unused, connect the pin to GND.
IWRN88IOvercurrent detection setting. A resistor across IWRN to GND sets the over current comparator threshold.
Connect IWRN to GND if overcurrent protection feature is not desired.
TMR99IFault Timer Input. A capacitor across TMR pin to GND sets the time for fault warning, fault turn-off (FLT_I) and retry periods.
Leave it open for fastest setting. Connect TMR to GND to disable overcurrent protection.
DIODE1010IDiode connection for temperature sensing. Connect this pin to base and collector of an MMBT3904 NPN BJT.

Connect DIODE to GND, if remote overtemperature protection feature is not desired.

G—11OGATE of external pre-charge FET. Connect to the GATE of the external FET.

Leave the G pin floating if the G drive functionality is unused.

N.C11——No connect.
BST1212OHigh Side Bootstrapped Supply. An external capacitor with a minimum value of > Qg(tot) of the external FET must be connected between this pin and SRC.
SRC1313OSource connection of the external FET.
PD1414OHigh Current Gate Driver Pull-Down. This pin pulls down to SRC. For the fastest turn-off, tie this pin directly to the gate of the external high side MOSFET.
PU1515OHigh Current Gate Driver Pull-Up. This pin pulls up to BST. Connect this pin to PD for maximum gate drive transition speed. A resistor can be connected between this pin and the gate of the external MOSFET to control the in-rush current during turn-on.
CS-1717ICurrent sense negative input.
CS+1818ICurrent sense positive input. Connect a 50 - 100-Ω resistor across CS+ to the external current sense resistor.
ISCP1919IShort-circuit detection threshold setting. Connect ISCP to CS– if short-circuit protection is not desired.
VS20

20

PowerSupply pin of the controller.