SLUSEF1D September   2021  – November 2024 TPSM82864A , TPSM82866A

PRODMIX  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Options
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Save Mode
      2. 7.3.2 Forced PWM Mode
      3. 7.3.3 Optimized Transient Performance from PWM to PSM Operation
      4. 7.3.4 Low Dropout Operation (100% Duty Cycle)
      5. 7.3.5 Soft Start
      6. 7.3.6 Switch Current Limit and HICCUP Short-Circuit Protection
      7. 7.3.7 Undervoltage Lockout
      8. 7.3.8 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable and Disable (EN)
      2. 7.4.2 Output Discharge
      3. 7.4.3 Power Good (PG)
      4. 7.4.4 Output Voltage and Mode Selection (VSET/MODE)
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Setting The Output Voltage
        2. 8.2.2.2 Input and Output Capacitor Selection
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Examples
        1. 8.4.2.1 Thermal Considerations
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

7.3.1 Power Save Mode

As the load current decreases, the device seamlessly enters power save mode (PSM) operation. In PSM, the converter operates with a reduced switching frequency and a minimum quiescent current to maintain high efficiency. Power save mode is based on a fixed on-time architecture, as shown in Equation 1. The inductance used in the RCF package using MagPack technology is 200 nH typical where the inductance used in the RDJ and RDM packages is 220 nH typical.

Equation 1. t O N = V O U T V I N ×   f S W

For very small output voltages, an absolute minimum on time of approximately 50ns is kept to limit switching losses. The operating frequency is thereby reduced from the nominal value, which keeps efficiency high. The switching frequency in PSM is estimated as:

Equation 2. f P S M = 2   ×   I O U T t O N 2 × V I N V O U T × V I N -   V O U T L

The load current at which PSM is entered is at one half of the ripple current of the inductor and can be estimated as:

Equation 3. I L o a d ( P S M - e n t r y ) = V I N × t O N 2 × 1 -   V O U T V I N L

In power save mode, the output voltage rises slightly above the nominal output voltage. This effect is minimized by increasing the output capacitance.