The frequency dither function in AAM reduces the conducted EMI noise and results in EMI filter size reduction. Conventionally, the dither carrier frequency is in the range of hundreds of Hz. However, when the control loop bandwidth is pushed higher in order to improve the load transient response, the control loop will be able to correct the disturbance from the dither signal, and weakens the EMI frequency spreading effectiveness. Even though increasing the dither frequency to few kHz can reduce the influence of the control loop, the audible noise issue will occur. For UCC28781-Q1, since itis able to run at a higher switching frequency in AAM, the dither frequency can be optimized at 23 kHz, so as to avoid audible noise and desensitize the loop response effect on the EMI attenuation.

UCC28781-Q1 enhances the response of the ZVS control loop, such that the ZVS performance can be maintained in most switching cycles even under a strong EMI dither condition. A triangular dither signal is superimposed on the feedback voltage signal V_CST, The novel feed-forward control method is applied to allow the ZVS loop to correct the timing error much faster, so ZVS can be maintained and the efficiency will not suffer.

Conventionally, the dither magnitude is fixed across the whole output voltage range. Since the higher output voltage condition needs to deliver a higher output power, the EMI issue is typically more severe, so a stronger dither signal is needed for more conducted EMI reduction. In the lower output voltage condition, the output ripple specification is usually much tighter, so a strong dither signal may aggravate the output voltage ripple and create the design tradeoff. For UCC28781-Q1, the two-level dither magnitude is adjusted automatically based on the output voltage level, so the perturbed output ripple at the lower output voltage condition can be reduced to meet a more stringent ripple requirement, and the strong dither can still be applied to the higher output voltage condition for the better EMI performance. Specifically, when V_VS is lower than 2.4 V during the demagnetization time (the LOW_NVO logic signal is high), the peak-to-peak dither magnitude on CS pin is reduced to around 36 mV. When V_VS is higher than 2.5 V, the peak-to-peak dither magnitude on CS pin is increased to around 98 mV.

Since the low-line efficiency usually determines the power stage thermal limit, the efficiency will drop further when EMI dither is enabled. Since the bulk capacitor ripple voltage at low line is bigger than at high line and AAM mode forces variable frequency operation, the line frequency causes nature dither frequency anyway even without applying the internal EMI dither. Therefore, taking advantage of AAM mode, the dither function at low line can be disabled based on the brown-in voltage setting, so the option provides design flexibility to trade-off the worst-case low-line efficiency and EMI. Specifically, when i_VSL is higher than 646 μA, the EMI dither function is enabled. When i_VSL is lower than 580 μA, the EMI dither function is disabled. If the brown-in point is set at 75 Vac, this means that the EMI dither is disabled for 90 Vac and 115 Vac.

The dither fading feature allows the dither signal to be smoothly disabled, when the output load current is close to the transition point between AAM and ABM. As shown in Figure 7-25, V_CST(MAX) and V_CST(BUR) are used as the two voltage-clamping targets to the perturbed V_CST signal. When the V_CST reaches V_CST(MAX), the top of the V_CST ripple content is clipped by the internal clamp circuit, so the influence of the EMI dither on the peak power capability can be eliminated. When the V_CST reaches V_CST(BUR), the bottom of the V_CST ripple content is clipped by an another internal clamp circuit, so the influence of the EMI dither on the ABM waveform is removed.

Figure 7-25 Dither Fading Feature in AAM