SLUSEI6 November 2021 UCC28781-Q1
PRODUCTION DATA
There are three components in the application circuit to help the depletion MOSFET (QS) perform ZVS sensing safely: CSWS, RSWS, and DSWS. Design considerations and selection guidelines for the values of these components are given here.
At the rising edge of the switch-node voltage, the fast dV/dt may couple through the drain-to-source capacitance of QS (COSS(Qs)) and generate a charge current that flows into the circuit loading on the QS source pin. The result may be a possible voltage overshoot on both the SWS pin and across the gate-to-source of QS (VGS(Qs)) because the gate is tied to P13. The SWS pin, having an absolute maximum voltage rating of 38 V, can handle higher voltage stress than VGS(Qs). Therefore, carefully select a capacitor (CSWS) between the SWS pin and GND to prevent the voltage overshoot from damaging the QS gate. Because COSS(Qs) and CSWS form a voltage divider, the minimum CSWS (CSWS(min)) can be derived as
where
Without resistive damping, both the charge current on the rising edge of VSW and the discharge current on the falling edge of VSW may oscillate with the parasitic series inductance within the ZVS sensing network resonating with CSWS. Therefore, a series resistor (RSWS) between SWS pin and source-pin of QS is used to dampen any high-frequency ringing, helping to obtain a cleaner sensing signal on the SWS pin and preventing any high-frequency current from interfering with other noise-sensitive signals. RSWS can be expressed as:
where
For most applications, use a resistor value slightly higher than 500 Ω. The resistor and a 22-pF ceramic capacitor between the SWS pin and the bulk input capacitor ground form a small sensing delay to help the internal detection circuit to identify the ZVS characteristic correctly.
Based on the above design guide, even though RSWS and CSWS may be sufficient to manage the voltage overshoot in normal operation, a low-capacitance bi-directional TVS diode (DSWS) across BSS126 gate and source is highly recommended to serve as a safety backup of the ZVS sensing network. Regular Zener diodes are not suitable due to high capacitance and slow clamping response. Ensure the clamping voltage of DSWS is less than BSS126 voltage rating but greater than 15 V.
A general recommendation is to use a 50-V 22-pF C0G-type ceramic capacitor for CSWS, a 510-Ω chip resistor for RSWS, and a bi-directional TVS diode with clamp voltage of 18 V for DSWS. Too large of RSWS or CSWS introduces a sensing delay between the actual VSW and the SWS pin, causing the ZVS control to unnecessarily extend tDM in order to pull down VSW earlier than expected before the end of tZ . As shown in Figure 7-5, the larger RSWS is, the smaller supply current to charge the VDD capacitor. If the reduced charge current (ISWS) is lower than the total consumed current from the controller (ISTART) and from the external circuitry on the VDD and P13 pins, VVDD may not be able to reach VVDD(ON) and the controller can not initiate any switching event.