SLUSEI6
November 2021
UCC28781-Q1
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Detailed Pin Description
7.3.1
BUR Pin (Programmable Burst Mode)
7.3.2
FB Pin (Feedback Pin)
7.3.3
REF Pin (Internal 5-V Bias)
7.3.4
VDD Pin (Device Bias Supply)
7.3.5
P13 and SWS Pins
7.3.6
S13 Pin
7.3.7
IPC Pin (Intelligent Power Control Pin)
7.3.8
RUN Pin (Driver and Bias Source for Isolator)
7.3.9
PWMH and AGND Pins
7.3.10
PWML and PGND Pins
7.3.11
SET Pin
7.3.12
RTZ Pin (Sets Delay for Transition Time to Zero)
7.3.13
RDM Pin (Sets Synthesized Demagnetization Time for ZVS Tuning)
7.3.14
XCD Pin
7.3.15
CS, VS, and FLT Pins
7.4
Device Functional Modes
7.4.1
Adaptive ZVS Control with Auto-Tuning
7.4.2
Dead-Time Optimization
7.4.3
EMI Dither and Dither Fading Function
7.4.4
Control Law Across Entire Load Range
7.4.5
Adaptive Amplitude Modulation (AAM)
7.4.6
Adaptive Burst Mode (ABM)
7.4.7
Low Power Mode (LPM)
7.4.8
First Standby Power Mode (SBP1)
7.4.9
Second Standby Power Mode (SBP2)
7.4.10
Startup Sequence
7.4.11
Survival Mode of VDD (INT_STOP)
7.4.12
System Fault Protections
7.4.12.1
Brown-In and Brown-Out
7.4.12.2
Output Over-Voltage Protection (OVP)
7.4.12.3
Input Over Voltage Protection (IOVP)
7.4.12.4
Over-Temperature Protection (OTP) on FLT Pin
7.4.12.5
Over-Temperature Protection (OTP) on CS Pin
7.4.12.6
Programmable Over-Power Protection (OPP)
7.4.12.7
Peak Power Limit (PPL)
7.4.12.8
Output Short-Circuit Protection (SCP)
7.4.12.9
Over-Current Protection (OCP)
7.4.12.10
External Shutdown
7.4.12.11
Internal Thermal Shutdown
7.4.13
Pin Open/Short Protections
7.4.13.1
Protections on CS pin Fault
7.4.13.2
Protections on P13 pin Fault
7.4.13.3
Protections on RDM and RTZ pin Faults
8
Application and Implementation
8.1
Application Information
8.2
Typical Application Circuit
8.2.1
Design Requirements for a 60-W, 15-V ZVSF Bias Supply Application with a DC Input
8.2.2
Detailed Design Procedure
8.2.2.1
Input Bulk Capacitance and Minimum Bulk Voltage
8.2.2.2
Transformer Calculations
8.2.2.2.1
Primary-to-Secondary Turns Ratio (NPS)
8.2.2.2.2
Primary Magnetizing Inductance (LM)
8.2.2.2.3
Primary Winding Turns (NP)
8.2.2.2.4
Secondary Winding Turns (NS)
8.2.2.2.5
Auxiliary Winding Turns (NA)
8.2.2.2.6
Winding and Magnetic Core Materials
8.2.2.3
Calculation of ZVS Sensing Network
8.2.2.4
Calculation of BUR Pin Resistances
8.2.2.5
Calculation of Compensation Network
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.1.1
General Considerations
10.1.2
RDM and RTZ Pins
10.1.3
SWS Pin
10.1.4
VS Pin
10.1.5
BUR Pin
10.1.6
FB Pin
10.1.7
CS Pin
10.1.8
AGND Pin
10.1.9
PGND Pin
10.1.10
Thermal Pad
10.2
Layout Example
11
Device and Documentation Support
11.1
Documentation Support
11.1.1
Receiving Notification of Documentation Updates
11.2
Support Resources
11.3
Trademarks
11.4
Electrostatic Discharge Caution
11.5
Glossary
12
Mechanical, Packaging, and Orderable Information
10
Layout