SLUSEY7B December   2022  – December 2024 TPSM82816

PRODMIX  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Precise Enable (EN)
      2. 7.3.2 Output Discharge
      3. 7.3.3 COMP/FSET
      4. 7.3.4 MODE/SYNC
      5. 7.3.5 Spread Spectrum Clocking (SSC)
      6. 7.3.6 Undervoltage Lockout (UVLO)
      7. 7.3.7 Power-Good Output (PG)
      8. 7.3.8 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Pulse Width Modulation (PWM) Operation
      2. 7.4.2 Power Save Mode Operation (PSM)
      3. 7.4.3 100% Duty-Cycle Operation
      4. 7.4.4 Current Limit and Short-Circuit Protection
      5. 7.4.5 Soft Start / Tracking (SS/TR)
  9. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Setting the Output Voltage
        2. 8.2.2.2 Feedforward Capacitor
        3. 8.2.2.3 Input Capacitor
        4. 8.2.2.4 Output Capacitor
      3. 8.2.3 Application Curves
    3. 8.3 System Examples
      1. 8.3.1 Voltage Tracking
      2. 8.3.2 Synchronizing to an External Clock
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
        1. 8.5.2.1 Thermal Consideration
  10. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Pin Configuration and Functions

TPSM82816 uSiP 14-Pin SIE PackageFigure 5-1 uSiP 14-Pin SIE Package
Figure 5-2 QFN-FCMOD 13-Pin VCA Package
Table 5-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME SIE VCA
EN 2 9 I This pin is the enable pin of the device. Connect to logic low to disable the device. Pull high to enable the device. Do not leave this pin unconnected.
FB 7 3 I Voltage feedback input. Connect the output voltage resistor divider to this pin.
GND 6, 10, 13, 14 2, 6, 12 Ground pin
MODE/SYNC 4 11 I The device runs in PSM (auto PFM/PWM transition) mode when this pin is pulled low. When the pin is pulled high, the device runs in forced PWM mode. Do not leave this pin unconnected. The MODE/SYNC pin can also be used to synchronize the device to an external frequency. See Synchronizing to an External Clock.
COMP/FSET 9 5 I Device compensation and frequency set input. A resistor from this pin to GND defines the compensation of the control loop as well as the switching frequency if not externally synchronized. The switching frequency is set to 2.25 MHz if the pin is tied to GND or VIN. Spread spectrum is also enabled and disabled by this pin. See COMP/FSET. Do not leave this pin unconnected.
PG 3 10 O Open-drain power-good output with window comparator. This pin is pulled to GND while VOUT is outside the power-good threshold. This pin can be left open or tied to GND if not used. A pullup resistor can be connected to any voltage not larger than VIN.
SS/TR 8 4 I Soft-start, tracking pin. A capacitor connected from this pin to GND defines the output voltage rise time. The pin can also be used as an input for tracking and sequencing - see Voltage Tracking.
VOUT 5 1 Output voltage pin. This pin is internally connected to the integrated inductor.
VIN 1, 11, 12 8, 13 Power supply input. Connect the input capacitor as close as possible between the VIN and GND pins.
SW 7 O Switch pin of the power stage. This pin can be left floating.
I = input, O = output