SLUSF93D January   2024  – June 2024 UCC33420-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Insulation Specifications
    6. 5.6 Safety-Related Certifications
    7. 5.7 Electrical Characteristics
    8. 5.8 External BOM Components
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Enable and Disable
      2. 6.3.2 Output Voltage Soft-Start and Steady-State Regulation
      3. 6.3.3 Protection Features
        1. 6.3.3.1 Input Under-voltage and Over-Voltage Lockout
        2. 6.3.3.2 Output Under-Voltage Protection
        3. 6.3.3.3 Output Over-Voltage Protection
        4. 6.3.3.4 Over-Temperature Protection
        5. 6.3.3.5 Fault Reporting and Auto-Restart
      4. 6.3.4 VCC Output Voltage Selection
      5. 6.3.5 VCC Load Recommended Operating Area
      6. 6.3.6 Electromagnetic Compatibility (EMC) Considerations
    4. 6.4 Device Functional Modes
    5. 6.5 Pre-Production Samples Operating Limits
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical and Packaging Information

6.5 Pre-Production Samples Operating Limits

UCC33420-Q1 pre-production samples have the following operating limits. Production devices will have these limitations removed.

  1. For ambient operating temperature < 0°C, the following sequence is required to allow the device reach regulation point during start-up. EN/FLT pin required to be high (VEN/FLT > VEN_R ) before applying input voltage VINP to the device. This can be achieved by connecting EN/FLT pin after the 18kΩ resistor directly to the VINP pin and applying VINP with rise time > 6ms on the device.
  2. For ambient operating temperature < 0°C, the following protection features; short-circuit, UVP and OVP protections of VCC output are disabled. Fault reporting and auto-restart features due to these faults will be disabled as well. If the part shuts down as a result of fault condition, the part will require to follow the same condition in step 1 above to restart and reach regulation. This require to recycle VINP by falling below VVINP_UVLO_F and then rising above VVINP_UVLO_R with the same > 6ms rise time.