SLUSFD4A August   2024  – October 2024 TPS62A03 , TPS62A03A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Save Mode
      2. 7.3.2 100% Duty Cycle Low Dropout Operation
      3. 7.3.3 Soft Start
      4. 7.3.4 Switch Current Limit and Short-Circuit Protection (HICCUP)
      5. 7.3.5 Undervoltage Lockout
      6. 7.3.6 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable and Disable
      2. 7.4.2 Power Good
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Setting the Output Voltage
        2. 8.2.2.2 Output Filter Design
        3. 8.2.2.3 Input and Output Capacitor Selection
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

7.4.2 Power Good

The TPS62A03 has a built-in power-good (PG) feature to indicate whether the output voltage has reached the target and the device is ready. The PG signal can be used for start-up sequencing of multiple rails. The PG pin is an open-drain output that requires a pullup resistor to any voltage up to the recommended input voltage level. PG is low when the device is turned off due to EN, UVLO (undervoltage lockout), or thermal shutdown. VIN must remain present for the PG pin to stay low. If not used, the power-good can be tie to GND or left open. The PG indicator has a deglitch to avoid the signal indicating glitches or transient responses from the loop.

Table 7-1 Power-Good indicator Functional Table
Logic Signals PG Status
VI EN Pin Thermal Shutdown VO
VI > UVLO HIGH NO VO on target High Impedance
VO < target LOW
YES x LOW
LOW x x LOW
VI < 1.8V x x x Undefined