SLUSFL6 June 2024 TPSM82866C
ADVANCE INFORMATION
After the start-up period (tStartup), the output voltage can be selected between two output voltage registers by the VID pin. When VID is pulled low, the output voltage is set by Table 8-2. When VID is pulled high, the output voltage is set by Table 8-3. This is also called dynamic voltage scaling (DVS). If the VID function is not used, the VSET resistor keeps the VSET/VID pin low and the VOUT Register 1 sets the Output voltage.
During an output voltage change through I2C or the VSET/VID pin, the device can be configured to operate in FPWM by setting the Enable FPWM Mode during Output Voltage Change bit in CONTROL register to 1. In FPWM Mode, the ramp-up and ramp-down speeds are controlled by the device. In PSM Mode the ramp-up speed is controlled by the device, but the ramp-down speed is determined by the load current and the output capacitance. The output voltage change speed is set by the Voltage Ramp Speed bit.