SLUU182A
January 2004 – March 2022
TPS5124
Trademarks
1
Introduction
2
Features
3
Schematic
4
Design Procedure
4.1
Frequency Setting
4.2
Inductance Value
4.3
Output Capacitors
4.4
Input Capacitors
4.4.1
Case One: D1, D2 < 0.5
4.4.2
Case Two: D2 < 0.5 < D1
4.5
Compensation Design
4.6
Current Limiting
4.7
Timer Latch
4.7.1
Undervoltage Protection
4.7.2
Short Circuit Protection
4.7.3
Overvoltage Protection
4.7.4
Disabling the Protection Function
4.7.4.1
Disabling the Overcurrent Protection
4.7.4.2
Disabling the Overvoltage Protection or Undervoltage Protection
5
Test Results
5.1
Efficiency Curves
5.2
Typical Operating Waveform
5.3
Start-Up Waveform
5.4
Output Ripple Voltage and Load Transient
6
Layout Guidelines
6.1
Low-Side MOSFET
6.2
Connections
6.3
Bypass Capacitor
6.4
Bootstrap Capacitor
6.5
Output Voltage
7
PCB Layout
8
List of Materials
9
Revision History
6.1
Low-Side MOSFET
The source of the low-side MOSFETs should be referenced with PWRGND. Otherwise, ANAGND is subject to the noise of the outputs.
PWRGND should be placed closed to the soruce of the low-side MOFSFETs.