SLUU274A May   2007  – January 2022 TPS40193

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Description
    2. 1.2 Applications
    3. 1.3 Features
  3. 2TPS40193EVM-001 Electrical Performance Specifications
  4. 3Schematic
  5. 4General Configuration and Description
    1. 4.1 Adjusting Output Voltage (R7)
    2. 4.2 Adjusting Short-Circuit Protection (R9)
    3. 4.3 Disable Jumper (JP1)
    4. 4.4 Test Point Descriptions
      1. 4.4.1 Input Voltage Monitoring (TP1, TP2)
      2. 4.4.2 Power-Good (TP3, TP4, TP5)
      3. 4.4.3 Compensation and Initialization (TP6)
      4. 4.4.4 Switching Waveforms (TP7, TP8, TP9, TP10)
      5. 4.4.5 Loop Analysis (TP11, TP12, TP13, TP14)
      6. 4.4.6 Output Voltage and Monitoring (TP15, TP16)
      7. 4.4.7 Pre-Bias Input (TP17)
  6. 5Test Setup
    1. 5.1 Equipment
      1. 5.1.1 Voltage Source
      2. 5.1.2 Meters
      3. 5.1.3 Loads
      4. 5.1.4 Oscilloscope
      5. 5.1.5 Recommended Wire Gauge
      6. 5.1.6 Other
    2. 5.2 Equipment Setup
    3. 5.3 Start-Up/Shutdown Procedure
    4. 5.4 Output Ripple Voltage Measurement Procedure
    5. 5.5 Control Loop Gain and Phase Measurement Procedure
    6. 5.6 Equipment Shutdown
  7. 6TPS40193EVM-001 Typical Performance Data and Characteristic Curves
    1. 6.1 Efficiency
    2. 6.2 Line and Load Regulation
    3. 6.3 Output Voltage Ripple
    4. 6.4 Switch Node
    5. 6.5 Control Loop Bode Plot
      1. 6.5.1 Low Line (VIN = 8 V)
      2. 6.5.2 High Line (VIN = 14 V)
  8. 7EVM Assembly Drawings and Layout
  9. 8Bill of Materials
  10. 9Revision History

7 EVM Assembly Drawings and Layout

Figure 7-1 through Figure 7-6 show the design of the TPS40193EVM-001 printed circuit board (PCB). The EVM has been designed using a 4-layer, 2oz, copper-clad PCB (2.5 inch × 2.5 inch), with all components in a 1.54-inch × 0.76-inch active area on the top side and all active traces to the top and bottom layers of the board. This configuration allows the user to easily view, probe, and evaluate the TPS40193 control IC in a practical, double-sided application. Moving components to both sides of the PCB or using additional internal layers can offer additional size reduction for space-constrained systems.

Unless otherwise specified, these figures illustrate the view from the top side of the PCB.

Note:

Board layouts are not to scale. These figures are intended to show how the board is laid out; they are not intended to be used for manufacturing TPS40193EVM-001 PCBs.

GUID-681FCE4A-AF42-40CA-A8A9-318A13777498-low.gifFigure 7-1 TPS40193EVM-001 Component Placement
GUID-C59DBCE5-9B86-4400-8EDC-A82C3B7B6A0D-low.gifFigure 7-2 TPS40193EVM-001 Silkscreen
GUID-A641EDED-1986-4FF6-99B5-5A751D1A44A3-low.gifFigure 7-3 TPS40193EVM-001 Top Copper Layer
GUID-BA404E2A-155D-46CA-9847-7A84024A2CDE-low.gifFigure 7-4 TPS40193EVM-001 Bottom Copper Layer
GUID-0F77502F-E6DE-497E-A0E7-951E3FD29A31-low.gifFigure 7-5 TPS40193EVM-001 Internal Layer 1
GUID-AF50DFEA-8C8F-4100-9436-5494BF002AB2-low.gifFigure 7-6 TPS40193EVM-001 Internal Layer 2