SLUUBT5C November 2018 – June 2021 BQ40Z80
Class | Subclass | Name | Type | Min | Max | Default | Unit |
---|---|---|---|---|---|---|---|
Settings | Permanent Failure | Enabled PF B | H1 | 0x00 | 0xFF | 0x00 | — |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ASCDL | ASCCL | AOLDL | VIMA | VIMR | CD | IMP | CB |
ASCDL (Bit 7): Short circuit in discharge—PF enable | ||
1 = | Enabled | |
0 = | Disabled | |
ASCCL (Bit 6): Short circuit in charge—PF enable | ||
1 = | Enabled | |
0 = | Disabled | |
AOLDL (Bit 5): Overload in discharge—PF enable | ||
1 = | Enabled | |
0 = | Disabled | |
VIMA (Bit 4): Voltage imbalance active | ||
1 = | Enabled | |
0 = | Disabled | |
VIMR (Bit 3): Voltage imbalance at rest | ||
1 = | Enabled | |
0 = | Disabled | |
CD (Bit 2): Capacity degradation | ||
1 = | Enabled | |
0 = | Disabled | |
IMP (Bit 1): Cell impedance | ||
1 = | Enabled | |
0 = | Disabled | |
CB (Bit 0): Cell balancing | ||
1 = | Enabled | |
0 = | Disabled |