SLUUBT5C November 2018 – June 2021 BQ40Z80
This command returns the OperationStatus() flags on ManufacturerBlockAccess() or ManufacturerData().
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
IATA_ CTERM | RSVD | EM SHUT | CB | SLP CC | SLP AD | SMBLCAL | INIT | SLEEPM | XL | CAL_OFFSET | CAL | AUTOCALM | AUTH | LED | SDM |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SLEEP | XCHG | XDSG | PF | SS | SDV | SEC1 | SEC0 | BTP_ INT | RSVD | FUSE | PDSG | PCHG | CHG | DSG | PRES |
IATA_CTERM (Bit 31): IATA charge control | ||
1 = | Active | |
0 = | Inactive | |
RSVD (Bits 30): Reserved. Do not use. | ||
EMSHUT (Bit 29): Emergency FET shutdown | ||
1 = | Active | |
0 = | Inactive | |
CB (Bit 28): Cell balancing status | ||
1 = | Active | |
0 = | Inactive | |
SLPCC (Bit 27): CC measurement in SLEEP mode | ||
1 = | Active | |
0 = | Inactive | |
SLPAD (Bit 26): ADC measurement in SLEEP mode | ||
1 = | Active | |
0 = | Inactive | |
SMBLCAL (Bit 25): Auto CC calibration when the bus is low. This bit may not be read by the host because the FW will clear it when a communication is detected. | ||
1 = | Auto CC calibration starts | |
0 = | When the bus is high or communication is detected for the case of [IN_SYSTEM_SLEEP] = 1. | |
INIT (Bit 24): Initialization after full reset | ||
1 = | Active | |
0 = | Inactive | |
SLEEPM (Bit 23): SLEEP mode triggered via command | ||
1 = | Active | |
0 = | Inactive | |
XL (Bit 22): 400-kHz SMBus mode | ||
1 = | Active | |
0 = | Inactive | |
CAL_OFFSET (Bit 21): Calibration output (raw CC offset data) | ||
1 = | Active when the MAC OutputShortedCCADCCal() is sent and the raw shorted CC data for calibration is available. | |
0 = | When the raw shorted CC data for calibration is not available. | |
CAL (Bit 20): Calibration output (raw ADC and CC data) | ||
1 = | Active when either the MAC OutputCCADCCal() or OutputShortedCCADCCal() is sent and the raw CC and ADC data for calibration is available. | |
0 = | When the raw CC and ADC data for calibration is not available. | |
AUTOCALM (Bit 19): Auto CC Offset calibration by the MAC AutoCCOffset() | ||
1 = | The gauge receives the MAC AutoCCOffset() and starts the CC Auto Offset calibration. | |
0 = | Clear when the calibration is completed. | |
AUTH (Bit 18): Authentication in progress | ||
1 = | Active | |
0 = | Inactive | |
LED (Bit 17): LED Display | ||
1 = | LED display is on. | |
0 = | LED display is off. | |
SDM (Bit 16): Shutdown triggered via command | ||
1 = | Active | |
0 = | Inactive | |
SLEEP (Bit 15): SLEEP mode conditions met | ||
1 = | Active | |
0 = | Inactive | |
XCHG (Bit 14): Charging disabled | ||
1 = | Active | |
0 = | Inactive | |
XDSG (Bit 13): Discharging disabled | ||
1 = | Active | |
0 = | Inactive | |
PF (Bit 12): PERMANENT FAILURE mode status | ||
1 = | Active | |
0 = | Inactive | |
SS (Bit 11): SAFETY status. This is the ORd value of all the Safety Status bits. | ||
1 = | Active | |
0 = | Inactive | |
SDV (Bit 10): Shutdown triggered via low battery stack voltage | ||
1 = | Active | |
0 = | Inactive | |
SEC1, SEC0 (Bits 9–8): SECURITY mode | ||
0, 0 = | Reserved | |
0, 1 = | Full Access | |
1, 0 = | Unsealed | |
1, 1 = | Sealed | |
BTP_INT (Bit 7): Battery trip point interrupt. Setting and clearing this bit depends on various conditions. | ||
See Section 8.9 for details. | ||
RSVD (Bit 6): Reserved. Do not use. | ||
FUSE (Bit 5): Fuse status | ||
1 = | Active | |
0 = | Inactive | |
PDSG (Bit 4): Pre-discharge FET status | ||
1 = | Active | |
0 = | Inactive | |
PCHG (Bit 3): Precharge FET status | ||
1 = | Active | |
0 = | Inactive | |
CHG (Bit 2): CHG FET status | ||
1 = | Active | |
0 = | Inactive | |
DSG (Bit 1): DSG FET status | ||
1 = | Active | |
0 = | Inactive | |
PRES (Bit 0): System present low | ||
1 = | Active | |
0 = | Inactive |