SLUUBT5C November 2018 – June 2021 BQ40Z80
Set Settings:Pin Configuration[MFP16_SEL0][MFP16_SEL1] = 00 to select CB7EN. When this mode is selected, the pin is used as an enable pin to cause an NFET to pull down a PFET gate. The PFET enables/disables the external cell balancing circuit for Cell 7. This pin is driven high to turn on the NFET and PFET and to enable cell balancing. This pin is driven low to turn off the NFET and to let the PFET gate be pulled high, disabling the divider. A pullup resistor from the PFET gate to BAT ensures that the PFET gate turns off when the pin is driven low and the NFET is off. A pulldown resistor from the NFET gate to VSS ensures that the NFET turns off while the gauge is in SHUTDOWN (and this pin is high-Z).