SLUUBW5A July 2018 – September 2021 BQ34Z100-G1
Reading 16-bit dynamic values from an 8-bit HDQ device requires special care to ensure that a register update occurring during the process of reading the two 8-bit bytes of the 16-bit word does not cause an inappropriate value read by the host. For example, if the 16-bit word is an incrementing or decrementing counter, it is possible that a carry or borrow to the high byte could occur after one data byte is read, but before the other data byte is read. In this case, the word read by the host might be as much as 256 counts in error due to the low-high byte rollover that occurred during the data read process. To prevent any system issues, any 16-bit values read by the host should be read with the following protocol:
This procedure is sufficient to ensure that the 16-bit word is read correctly if the 3-byte to 4-byte reads occur in less time than the update rate of the register value.