SLUUCF8 March   2021 TPS53676

 

  1.   Trademarks
  2. 1 Introduction
  3. 2 Features
  4. 3 Applications
  5. 4 System Description
    1. 4.1 Phase configuration selection
    2. 4.2 Jumper details
    3. 4.3 On-board load transient
  6. 5 Test Equipment
  7. 6 Test Procedure
    1. 6.1 Start-up Test
    2. 6.2 Shut down Test
    3. 6.3 Steady-state Test
    4. 6.4 Load Transient Test
    5. 6.5 Efficiency Plot
    6. 6.6 Bode plot
  8. 7 Fusion GUI
  9. 8 Evaluation Module (EVM) Hardware
  10. 9 Schematic and Bill of Materials
  11. 10Read This First
    1. 10.1 About This Manual
    2. 10.2 Glossary
    3. 10.3 Related Documentation
    4. 10.4 Support Resources

4 System Description

The TPS53676EVM-084 is a 7-phase comprehensive evaluation module (EVM) for CPU/ASIC core power rail applications using the TPS53676 controller. Figure 4-1 shows the top side of the EVM and Figure 4-2 shows the bottom side of the EVM. The EVM possesses several hooks for placing meters and probes by providing appropriate test points on various nodes.

The copper lugs T1 and T2 are the conversion input terminals to the step-down DC/DC converter. Input terminals are the point of connection of the input DC voltage.

With J5 closed, an on-board buck converter (TPS62133) generates the 5-V power stage VDD voltage. With J5 open, TPS62133 is disabled, and the 5-V supply must be applied to J1 externally. A 5-V to 3.3-V LDO (TLV75733) generates the 3.3-V controller bias voltage, and also supplies auxiliary circuits and LEDs on the EVM.

The output terminals T3, T4, T5, T6, T7, T8, T9, T10, and T11 are copper lugs providing a connection point for the high-current load. Figure 4-3 shows the location of all component details in the EVM. The setup is explained in detail in next section.

GUID-20210315-CA0I-FG48-VS8D-ZQFDJXGL6QF8-low.jpgFigure 4-1 EVM Top View
GUID-20210315-CA0I-9BK7-K7NV-XDMZ4FXSCXTS-low.jpgFigure 4-2 EVM Bottom View
GUID-20210316-CA0I-RDND-TDLC-DSW91XPKLKBD-low.jpgFigure 4-3 EVM Options