FLASH_BUSY_WAIT (Bit 7):
This enables clock stretching during a flash program or erase operation. |
| 1 = | The BQ41Z50 device will clock stretch (up to the timeout for SMBus devices)
during flash operations. |
| 0 = | The BQ41Z50 device will NACK any SMBus engine interrupt that occurs during a
flash operation (program or erase). |
| | Note: There is some potential for read
errors with this bit. For example, when the master is reading data from the device,
there is no NACK from the gauge; therefore, the "NACK" in the hardware releases the
bus without writing new data to the SMBDA register, which means the read is whatever
is present at the time. PECs should catch this error. |
| | |
RSVD(Bit 6): Reserved.
Do no use. |
| | |
BLT1 (Bit 5): Bus low
timeout |
1,1 = | 3-s SBS bus low timeout |
1,0 = | 2-s SBS bus low timeout (default) |
0,1 = | 1-s SBS bus low timeout |
0,0 = | No SBS bus low timeout |
| | |
BLT0 (Bit 4): Bus low
timeout |
1,1 = | 3-s SBS bus low timeout |
1,0 = | 2-s SBS bus low timeout (default) |
0,1 = | 1-s SBS bus low timeout |
0,0 = | No SBS bus low timeout |
| |
XL (Bit 3): Enables
400-kHz COM mode |
| 1 = | 400-kHz bus speed |
| 0 = | Normal SBS bus speed (default) |
| | |
HPE (Bit 2): PEC on host
communication |
| 1 = | Enabled |
| 0 = | Disabled (default) |
| | |
CPE (Bit 1): PEC on
charger broadcast |
| 1 = | Enabled |
| 0 = | Disabled (default) |
| | |
BCAST (Bit 0): Enables
alert and charging broadcast from device to the host |
1 = | Enabled |
0 = | Disabled (default) |