SLUUCP8 June 2024 BQ41Z50
The BQ41Z50 device has a hardware-based short circuit in discharge protection with adjustable current and delay time. Additionally, this protection feature can be enabled to create a PF by setting the [ASCDL] bit in the Enabled PF B register.
Status | Condition | Action |
---|---|---|
Normal | Current() > (SCD1 Threshold[2:0]/RSENSE) AND Current() > (SCD2 Threshold[2:0]/RSENSE) | SafetyAlert()[ASCDL] = 0 if ASCDL counter = 0 PFAlert()[ASCDL] = 0 Decrement ASCDL counter by one after each SCD:Counter Dec Delay period, if ASCDL counter > 0 |
Trip | Current() ≤ (SCD1 Threshold[2:0]/RSENSE) for SCD1 Threshold[7:4] duration OR Current() ≤ (SCD2 Threshold[2:0]/RSENSE) for SCD2 Threshold[7:4] duration | SafetyStatus()[ASCD] = 1 OperationStatus()[XDSG] = 1 Increment ASCDL counter |
Recovery | SafetyStatus()[ASCD] = 1 for SCD:Recovery time | SafetyStatus()[ASCD] = 0 OperationStatus()[XDSG] = 0 if SafetyStatus()[ASCDL] = 0. |
Latch Alert | ASCDL counter > 0 | SafetyAlert()[ASCDL] = 1 PFAlert()[ASCDL] = 1, if PFEnable()[ASCDL] is set. |
Latch Trip | SCD counter ≥ SCD:Latch Limit | SafetyStatus()[ASCD] = 0 SafetyStatus()[ASCDL] = 1 OperationStatus()[XDSG] = 1 SafetyAlert()[ASCDL] = 0 PFAlert()[ASCDL] = 0 PFStatus()[ASCDL] = 1, if PFEnable()[ASCDL] is set. |
Latch Reset ([NR] = 0) | SafetyStatus()[ASCDL] = 1 AND DA Configuration[NR] = 0 AND Low-high-low transition on PRES pin | SafetyStatus()[ASCDL] = 0 OperationStatus()[XDSG] = 0 if SafetyStatus()[ASCD] = 0 |
Latch Reset ([NR] = 1) | SafetyStatus()[ASCCL] = 1 AND DA Configuration[NR] = 1 for SCD:Reset time | SafetyStatus()[ASCDL] = 0 OperationStatus()[XDSG] = 0 if SafetyStatus()[ASCD] = 0 |