SLUUCP8 June 2024 BQ41Z50
Class | Subclass | Name | Type | Min | Max | Default | Unit |
---|---|---|---|---|---|---|---|
Settings | Configuration | SOC Flag Config B | H2 | 0x0 | 0x00FF | 0x008C | Hex |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
FCCLEAR RSOC | FCSETRSOC | FCCLEARV | FCSETV | FDCLEAR RSOC | FDSETRSOC | FDCLEARV | FDSETV |
FCCLEARRSOC (Bit 7): Enables the FC flag clear by RSOC threshold | ||
1 = | Enabled (default) | |
0 = | Disabled | |
FCSETRSOC (Bit 6): Enables the FC flag set by RSOC threshold | ||
1 = | Enabled | |
0 = | Disabled (default) | |
FCCLEARV (Bit 5): Enables the FC flag clear by cell voltage threshold | ||
1 = | Enabled | |
0 = | Disabled (default) | |
FCSETV (Bit 4): Enables the FC flag set by cell voltage threshold | ||
1 = | Enabled | |
0 = | Disabled (default) | |
FDCLEARRSOC (Bit 3): Enables the FD flag clear by RSOC threshold | ||
1 = | Enabled (default) | |
0 = | Disabled | |
FDSETRSOC Bit 2: Enables the FD flag set by RSOC threshold | ||
1 = | Enabled (default) | |
0 = | Disabled | |
FDCLEARV (Bit 1): Enables the FD flag clear by cell voltage threshold | ||
1 = | Enabled | |
0 = | Disabled (default) | |
FDSETV (Bit 0): Enables the FD flag set by cell voltage threshold | ||
1 = | Enabled | |
0 = | Disabled (default) |