SLUUCP8 June 2024 BQ41Z50
The BQ41Z50 device has a hardware-based short circuit in charge protection with adjustable current and delay time. Additionally, this protection feature can be enabled to create a PF by setting the [ASCCL] bit in the Enabled PF B register.
Status | Condition | Action |
---|---|---|
Normal | Current() < (SCC Threshold[2:0]/RSENSE) | SafetyAlert()[ASCCL] = 0, if ASCCL counter = 0 PFAlert()[ASCCL] = 0 Decrement ASCCL counter by one after each SCC:Counter Dec Delay period, if ASCCL counter > 0 |
Trip | Current() ≥ (SCC Threshold[2:0]/RSENSE) for SCC Threshold[7:4] duration | SafetyStatus()[ASCC] = 1 BatteryStatus()[TCA] = 1 OperationStatus()[XCHG] = 1 increment ASCCL counter |
Recovery | SafetyStatus()[ASCC] = 1 for SCC:Recovery time | SafetyStatus()[ASCC] = 0 BatteryStatus()[TCA] = 0 OperationStatus()[XCHG] = 0 if SafetyStatus()[ASCCL] = 0. |
Latch Alert | ASCCL counter > 0 | SafetyAlert()[ASCCL] = 1 PFAlert()[ASCCL] = 1, if PFEnable()[ASCCL] is set. |
Latch Trip | ASCCL counter ≥ SCC:Latch Limit | SafetyAlert()[ASCCL] = 0 SafetyStatus()[ASCCL] = 1 OperationStatus()[XCHG] = 1 PFAlert()[ASCCL] = 0 PFStatus()[ASCCL] = 1, if PFEnable()[ASCCL] is set. |
Latch Reset ([NR] = 0) | SafetyStatus()[ASCCL] = 1 AND DA Configuration[NR] = 0 AND Low-high-low transition on PRES pin | SafetyStatus()[ASCCL] = 0 OperationStatus()[XCHG] = 0 if SafetyStatus()[ASCC] = 0 |
Latch Reset ([NR] = 1) | SafetyStatus()[ASCCL] = 1 AND DA Configuration[NR] = 1 for SCC:Reset time | SafetyStatus()[ASCCL] = 0 OperationStatus()[XCHG] = 0 if SafetyStatus()[ASCC] = 0 |