SLUUCY8 December   2023 BQ77307

 

  1.   1
  2.   Read This First
    1.     About This Manual
    2.     Battery Notational Conventions
    3.     Trademarks
    4.     Glossary
  3. 1 Introduction
  4. 2 Device Description
    1. 2.1 Overview
    2. 2.2 Functional Block Diagram
  5. 3 Device Configuration
    1. 3.1 Direct Commands and Subcommands
    2. 3.2 Configuration Using OTP or Registers
    3. 3.3 Data Formats
      1. 3.3.1 Unsigned Integer
      2. 3.3.2 Integer
      3. 3.3.3 Hex
  6. 4 Device Security
  7. 5 Protection Subsystem
    1. 5.1  Protections Overview
    2. 5.2  Protection Evaluation and Detection
    3. 5.3  Protection FET Drivers
    4. 5.4  Cell Overvoltage Protection
    5. 5.5  Cell Undervoltage Protection
    6. 5.6  Short Circuit in Discharge Protection
    7. 5.7  Overcurrent in Charge Protection
    8. 5.8  Overcurrent in Discharge 1 and 2 Protections
    9. 5.9  Current Protection Latch
    10. 5.10 CHG Detector
    11. 5.11 Overtemperature in Charge Protection
    12. 5.12 Overtemperature in Discharge Protection
    13. 5.13 Internal Overtemperature Protection
    14. 5.14 Undertemperature in Charge Protection
    15. 5.15 Undertemperature in Discharge Protection
    16. 5.16 Cell Open Wire Detection
    17. 5.17 Voltage Reference Diagnostic Protection
    18. 5.18 VSS Diagnostic Protection
    19. 5.19 REGOUT Diagnostic Protection
    20. 5.20 LFO Oscillator Integrity Diagnostic Protection
    21. 5.21 Internal Factory Trim Diagnostic Protection
  8. 6 Device Status and Controls
    1. 6.1 0x00 Control Status() and 0x12 Battery Status() Commands
    2. 6.2 Unused VC Cell Input Pins
    3. 6.3 LDOs
    4. 6.4 ALERT Pin Operation
    5. 6.5 TS Pin Operation
    6. 6.6 Device Event Timing
  9. 7 Operational Modes
    1. 7.1 Overview of Operational Modes
    2. 7.2 NORMAL Mode
    3. 7.3 SHUTDOWN Mode
    4. 7.4 CONFIG_UPDATE Mode
  10. 8 I2C Serial Communications
    1. 8.1 I2C Serial Communications Interface
  11. 9 Commands and Subcommands
    1. 9.1 Direct Commands
    2. 9.2 Bit Field Definitions for Direct Commands
      1. 9.2.1  Safety Alert A Register
      2. 9.2.2  Safety Status A Register
      3. 9.2.3  Safety Alert B Register
      4. 9.2.4  Safety Status B Register
      5. 9.2.5  Battery Status Register
      6. 9.2.6  Alarm Status Register
      7. 9.2.7  Alarm Raw Status Register
      8. 9.2.8  Alarm Enable Register
      9. 9.2.9  FET CONTROL Register
      10. 9.2.10 REGOUT CONTROL Register
    3. 9.3 Command-only Subcommands
    4. 9.4 Subcommands with Data
    5. 9.5 Bitfield Definitions for Subcommands
      1. 9.5.1 DEVICE NUMBER Register
      2. 9.5.2 FW VERSION Register
      3. 9.5.3 HW VERSION Register
      4. 9.5.4 SECURITY KEYS Register
      5. 9.5.5 PROT RECOVERY Register
  12. 10Data Memory
    1. 10.1 Settings
      1. 10.1.1 Settings:Configuration
        1. 10.1.1.1  Settings:Configuration:Reserved
        2. 10.1.1.2  Settings:Configuration:Power Config
        3. 10.1.1.3  Settings:Configuration:REGOUT Config
        4. 10.1.1.4  Settings:Configuration:I2C Address
        5. 10.1.1.5  Settings:Configuration:I2C Config
        6. 10.1.1.6  Settings:Configuration:TS Mode
        7. 10.1.1.7  Settings:Configuration:Vcell Mode
        8. 10.1.1.8  Settings:Configuration:Default Alarm Mask
        9. 10.1.1.9  Settings:Configuration:FET Options
        10. 10.1.1.10 Settings:Configuration:Charge Detector Time
      2. 10.1.2 Settings:Protection
        1. 10.1.2.1 Settings:Protection:Enabled Protections A
        2. 10.1.2.2 Settings:Protection:Enabled Protections B
        3. 10.1.2.3 Settings:Protection:DSG FET Protections A
        4. 10.1.2.4 Settings:Protection:CHG FET Protections A
        5. 10.1.2.5 Settings:Protection:Both FET Protections B
        6. 10.1.2.6 Settings:Protection:Cell Open Wire Check Time
    2. 10.2 Protections
      1. 10.2.1 Protections:Cell Voltage
        1. 10.2.1.1 Protections:Cell Voltage:Cell Undervoltage Protection Threshold
        2. 10.2.1.2 Protections:Cell Voltage:Cell Undervoltage Protection Delay
        3. 10.2.1.3 Protections:Cell Voltage:Cell Undervoltage Protection Recovery Hysteresis
        4. 10.2.1.4 Protections:Cell Voltage:Cell Overvoltage Protection Threshold
        5. 10.2.1.5 Protections:Cell Voltage:Cell Overvoltage Protection Delay
        6. 10.2.1.6 Protections:Cell Voltage:Cell Overvoltage Protection Recovery Hysteresis
      2. 10.2.2 Protections:Current
        1. 10.2.2.1  Protections:Current:Overcurrent in Charge Protection Threshold
        2. 10.2.2.2  Protections:Current:Overcurrent in Charge Protection Delay
        3. 10.2.2.3  Protections:Current:Overcurrent in Discharge 1 Protection Threshold
        4. 10.2.2.4  Protections:Current:Overcurrent in Discharge 1 Protection Delay
        5. 10.2.2.5  Protections:Current:Overcurrent in Discharge 2 Protection Threshold
        6. 10.2.2.6  Protections:Current:Overcurrent in Discharge 2 Protection Delay
        7. 10.2.2.7  Protections:Current:Short Circuit in Discharge Protection Threshold
        8. 10.2.2.8  Protections:Current:Short Circuit in Discharge Protection Delay
        9. 10.2.2.9  Protections:Current:Latch Limit
        10. 10.2.2.10 Protections:Current:Recovery Time
      3. 10.2.3 Protections:Temperature
        1. 10.2.3.1  Protections:Temperature:Overtemperature in Charge Protection Threshold
        2. 10.2.3.2  Protections:Temperature:Overtemperature in Charge Protection Delay
        3. 10.2.3.3  Protections:Temperature:Overtemperature in Charge Protection Recovery
        4. 10.2.3.4  Protections:Temperature:Undertemperature in Charge Protection Threshold
        5. 10.2.3.5  Protections:Temperature:Undertemperature in Charge Protection Delay
        6. 10.2.3.6  Protections:Temperature:Undertemperature in Charge Protection Recovery
        7. 10.2.3.7  Protections:Temperature:Overtemperature in Discharge Protection Threshold
        8. 10.2.3.8  Protections:Temperature:Overtemperature in Discharge Protection Delay
        9. 10.2.3.9  Protections:Temperature:Overtemperature in Discharge Protection Recovery
        10. 10.2.3.10 Protections:Temperature:Undertemperature in Discharge Protection Threshold
        11. 10.2.3.11 Protections:Temperature:Undertemperature in Discharge Protection Delay
        12. 10.2.3.12 Protections:Temperature:Undertemperature in Discharge Protection Recovery
        13. 10.2.3.13 Protections:Temperature:Internal Overtemperature Protection Threshold
        14. 10.2.3.14 Protections:Temperature:Internal Overtemperature Protection Delay
        15. 10.2.3.15 Protections:Temperature:Internal Overtemperature Protection Recovery
    3. 10.3 Power
      1. 10.3.1 Power:Configuration
        1. 10.3.1.1 Power:Configuration:Voltage CHECK Time
        2. 10.3.1.2 Power:Configuration:Body Diode Threshold
      2. 10.3.2 Power:Shutdown
        1. 10.3.2.1 Power:Shutdown:Shutdown Cell Voltage
        2. 10.3.2.2 Power:Shutdown:Shutdown Stack Voltage
        3. 10.3.2.3 Power:Shutdown:Shutdown Temperature
    4. 10.4 Security
      1. 10.4.1 Security:Settings
        1. 10.4.1.1 Security:Settings:Security Settings
        2. 10.4.1.2 Security:Settings:Full Access Key Step 1
        3. 10.4.1.3 Security:Settings:Full Access Key Step 2
      2. 10.4.2 Data Memory Summary
  13. 11Revision History

5.1 Protections Overview

The BQ77307 integrates an extensive protection subsystem which can monitor a variety of parameters, initiate protective actions, and autonomously recover based on conditions. The device also includes a wide range of flexibility, such that the device can be configured to monitor and initiate protective action, but with recovery controlled by a host processor, or such that the device only monitors and alerts the host processor whenever conditions warrant protective action, but with action and recovery fully controlled by the host processor. The protection subsystem includes a suite of individual protections that can be individually enabled and configured, as shown in Table 5-1. Some protection checks are primarily for diagnostic purposes, so the device can be autonomously disabled if a malfunction is detected. The device integrates NFET drivers for low-side CHG and DSG protection FETs, which can be configured in a series or parallel configuration.

Table 5-1 BQ77307 Protections
Protection Description
Cell Undervoltage Detects individual cell voltage below programmed threshold
Cell Overvoltage Detects individual cell voltage above programmed threshold
Overcurrent in Charge Detects charging current above programmed threshold
Overcurrent in Discharge 1 / 2 Two levels of detection for discharging current beyond programmed thresholds
Short Circuit in Discharge Detects discharging current above programmed threshold
Undertemperature in Charge Detects thermistor voltage below programmed threshold limit for charging operation
Overtemperature in Charge Detects thermistor voltage above programmed threshold limit for charging operation
Undertemperature in Discharge Detects thermistor voltage below programmed threshold limit for discharging operation
Overtemperature in Discharge Detects thermistor voltage above programmed threshold limit for discharging operation
Internal Overtemperature Detects internal device temperature above programmed threshold
REGOUT LDO Check Diagnostic check - detects voltage or temperature fault on REGOUT regulator when enabled
Voltage Reference Check Diagnostic check which compares VREF1 and VREF2, to detect if one varies significantly versus the other.
VSS Check Diagnostic check on internal mux - device periodically switches the mux to VSS and detects if the level exceeds an expected threshold.

The individual protections are enabled by setting the related Settings:Protection:Enabled Protections A – B data memory configuration registers. Most protections include a programmable threshold, and when the monitored parameter first exceeds the programmed threshold, a protection alert is asserted. After the parameter remains beyond the threshold for a programmable delay period, a protection status fault is asserted (and the alert is deasserted). The protection alerts are provided by the 0x02 Safety Alert A() and 0x04 Safety Alert B() commands, while the protection status faults are provided by the 0x03 Safety Status A() and 0x05 Safety Status B() commands, as shown below. Most protections also include a programmable recovery criteria, such that if the parameter no longer exceeds the threshold by some margin, the protection status fault is deasserted. Protection alert and status faults can be mapped to provide an interrupt to the host processor on the ALERT pin, using the 0x62 Alarm Status(), 0x64 Alarm Raw Status(), and 0x66 Alarm Enable() commands.

Table 5-2 Format for 0x02 Safety Alert A()
BitNameDescription
7COVCell Overvoltage Safety Alert
6CUVCell Undervoltage Safety Alert
5SCDShort Circuit in Discharge Safety Alert
4OCD1Overcurrent in Discharge 1 Safety Alert
3OCD2Overcurrent in Discharge 2 Safety Alert
2OCCOvercurrent in Charge Safety Alert
1-0RSVD0Reserved
Table 5-3 Format for 0x03 Safety Status A()
BitNameDescription
7COVCell Overvoltage Safety Fault
6CUVCell Undervoltage Safety Fault
5SCDShort Circuit in Discharge Safety Fault
4OCD1Overcurrent in Discharge 1 Safety Fault
3OCD2Overcurrent in Discharge 2 Safety Fault
2OCCOvercurrent in Charge Safety Fault
1CURLATCHCurrent Protection Latch Safety Fault
0REGOUTREGOUT Safety Fault
Table 5-4 Format for 0x04 Safety Alert B()
BitNameDescription
7OTDOvertemperature in Discharge Safety Alert
6OTCOvertemperature in Charge Safety Alert
5UTDUndertemperature in Discharge Safety Alert
4UTCUndertemperature in Charge Safety Alert
3OTINTInternal Overtemperature Safety Alert
2RSVD0Reserved
1VREFVREF Diagnostic Alert
0VSSVSS Diagnostic Alert
Table 5-5 Format for 0x05 Safety Status B()
BitNameDescription
7OTDOvertemperature in Discharge Safety Fault
6OTCOvertemperature in Charge Safety Fault
5UTDUndertemperature in Discharge Safety Fault
4UTCUndertemperature in Charge Safety Fault
3OTINTInternal Overtemperature Safety Fault
2RSVD0Reserved
1VREFVREF Diagnostic Fault
0VSSVSS Diagnostic Fault

The thresholds, delays, and recovery criteria are controlled by individual data memory settings in the Protections class. For example, the Cell Undervoltage Protection is configured using the Protections:Cell Voltage:Cell Undervoltage Protection Threshold, Protections:Cell Voltage:Cell Undervoltage Protection Delay, and Protections:Cell Voltage:Cell Undervoltage Protection Recovery Hysteresis data memory settings.

The control of the protection FETs in response to a detected protection event is also configurable, with the device able to operate in a fully autonomous mode, a completely manual mode (controlled through host commands over the serial communications bus), or a combination of the two. Autonomous mode is enabled by setting the Settings:Configuration:FET Options[FET_EN] data memory configuration bit or sending the 0x0022 FET Enable() subcommand, which toggles the [FET_EN] bit. The device can operate in a combined autonomous/manual mode, such that the device can operate autonomously when the host processor does not intervene, but still allows the host to override the autonomous decisions and force FETs on or off based on serial communications. This can be useful in cases where the host needs autonomous reaction to selected faults, such as a short circuit in discharge event, to provide the fastest protection response, but needs manual control for other faults, such as cell overtemperature or overvoltage faults. The 0x29 FET Control() command provides manual FET control capability by the host. If the user is concerned about unauthorized or inadvertent manual FET control by a host, these selected commands can be disabled using the Settings:Configuration:FET Options[HOST_FETOFF_EN] and [HOST_FETON_EN] data memory configuration settings. Each protection can be configured to autonomously disable the pertinent protection FET using the Settings:Protection:CHG FET Protections A, Settings:Protection:DSG FET Protections A, and Settings:Protection:Both FET Protections C settings.