SLUUD29 July   2024 TPS6286B10

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 Setup
      1. 2.1.1 Connector Descriptions
      2. 2.1.2 Hardware Setup
    2. 2.2 Warning and Caution
  8. 3Implementation Results
    1. 3.1 TPS6286B10EVM-049 Test Results
    2. 3.2 Modifications
      1. 3.2.1 Output Voltage Setting
      2. 3.2.2 I2C Interface
  9. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 Board Layout
    3. 4.3 Bill of Materials
  10. 5Additional Information
    1. 5.1 Trademarks

Board Layout

This section provides the TPS6286B10EVM-049 board layout.

TPS6286B10EVM-049 Top Layer CompositeFigure 4-2 Top Layer Composite
TPS6286B10EVM-049 Top LayerFigure 4-3 Top Layer
TPS6286B10EVM-049 Signal Layer 1Figure 4-4 Signal Layer 1
TPS6286B10EVM-049 Signal Layer 2Figure 4-5 Signal Layer 2
TPS6286B10EVM-049 Signal Layer 3Figure 4-6 Signal Layer 3
TPS6286B10EVM-049 Signal Layer 4Figure 4-7 Signal Layer 4
TPS6286B10EVM-049 Signal Layer 5Figure 4-8 Signal Layer 5
TPS6286B10EVM-049 Signal Layer 6Figure 4-9 Signal Layer 6
TPS6286B10EVM-049 Bottom LayerFigure 4-10 Bottom Layer