SLUUD29
July 2024
TPS6286B10
1
Description
Features
Applications
5
1
Evaluation Module Overview
1.1
Introduction
1.2
Kit Contents
1.3
Specification
1.4
Device Information
2
Hardware
2.1
Setup
2.1.1
Connector Descriptions
2.1.2
Hardware Setup
2.2
Warning and Caution
3
Implementation Results
3.1
TPS6286B10EVM-049 Test Results
3.2
Modifications
3.2.1
Output Voltage Setting
3.2.2
I2C Interface
4
Hardware Design Files
4.1
Schematic
4.2
Board Layout
4.3
Bill of Materials
5
Additional Information
5.1
Trademarks
4.2
Board Layout
This section provides the TPS6286B10EVM-049 board layout.
Figure 4-2
Top Layer Composite
Figure 4-3
Top Layer
Figure 4-4
Signal Layer 1
Figure 4-5
Signal Layer 2
Figure 4-6
Signal Layer 3
Figure 4-7
Signal Layer 4
Figure 4-8
Signal Layer 5
Figure 4-9
Signal Layer 6
Figure 4-10
Bottom Layer