SLVA275C january   2010  – may 2023 UCD9081

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2Hardware
    1. 2.1 Package: RHB (S-PQFP-N32), 32-Pin Plastic Quad Flatpack
    2. 2.2 Hardware and Pinout
    3. 2.3 Detailed Pin Descriptions
      1. 2.3.1 RST
      2. 2.3.2 SDA
      3. 2.3.3 SCL
      4. 2.3.4 ADDRx
      5. 2.3.5 ROSC
  5. 3Software
    1. 3.1 Data File Format
    2. 3.2 I2C Transactions
    3. 3.3 Device Version
    4. 3.4 Checksum
    5. 3.5 Sample Configuration Data File
      1. 3.5.1 Factory Default
      2. 3.5.2 EVM Default Configuration
    6. 3.6 I2C Write and Read Transaction Formats
      1. 3.6.1 I2C Write Transaction
      2. 3.6.2 I2C Read Transaction
    7. 3.7 Pseudo I2C Write and Read Transactions
      1. 3.7.1 UCD9081 I2C Transactions for Writing User Data and PARAMS
      2. 3.7.2 UCD9081 I2C Transactions for Reading User Data and PARAMS
  6. 4User Configuration
    1. 4.1 Configuration Parameter Memory Map
    2. 4.2 Configuration Parameter Detail
      1. 4.2.1  GpDir
      2. 4.2.2  NegateEnablePolarity
      3. 4.2.3  SeqEventPending
      4. 4.2.4  SequenceEventParameters
      5. 4.2.5  SequenceEventLink
      6. 4.2.6  SequenceEventData
      7. 4.2.7  DependencyMasks
      8. 4.2.8  UnderVoltageThresholds
      9. 4.2.9  OverVoltageThresholds
      10. 4.2.10 RampTime
      11. 4.2.11 OutOfRegulationWidth
      12. 4.2.12 UnsequenceTime
      13. 4.2.13 EnablePolarity
      14. 4.2.14 SaveRailLog
      15. 4.2.15 ReferenceSelect
      16. 4.2.16 LastUnusedSeq
      17. 4.2.17 IgnoreGlitchAlarms
      18. 4.2.18 IgnoreFlashErrorLog
      19. 4.2.19 Checksum
  7. 5Additional Considerations
    1. 5.1 Embedded Application
    2. 5.2 Timing
      1. 5.2.1 UCD9081 Startup
      2. 5.2.2 Clock Stretching After Flash Erase
      3. 5.2.3 Bit Timeout
      4. 5.2.4 Byte or Transaction Timeout
  8. 6References
  9. 7Revision History

5.2.1 UCD9081 Startup

I2C communication with the UCD9081 cannot be established immediately after power is applied. On power up, the UCD9081 performs several operations on the contents of the user parameter section. A RESET delay is incurred during this operation, and the digital I/O pins are in a high-impedance state. At the end of this operation, the sequencer application starts and I2C communication may commence.

The startup delay can vary based on the cases that follow;

  • Normal case: The UCD9081 performs a checksum test on the contents of the user parameter section. If the test passes, then the UCD9081 compares the contents of the user parameters section to the contents of the application (or last-known-good configuration) parameters section to see if the parameters have changed. If the two areas match, then the sequencer application starts. This nominally takes 35 ms as shown in Figure 5-1
    GUID-975767E2-1026-4DF7-A8AB-AB3423ED5C07-low.gifFigure 5-1 Power-Up Delay, no Parameter Change
  • Configuration change-pass checksum case: If the user parameter area has been updated but the device has not been RESET (see UCD9081 data sheet RESET description) then the user and application parameter areas do not match. After the next RESET, the checksum test occurs. If the test passes, then the UCD9081 copies the user parameters to the application parameters area. This nominally takes 102 ms as shown in Figure 5-2. Subsequent power ups (with unchanged user parameters) fall into the normal category.
  • Configuration change-fail checksum case: If the checksum test fails, then the UCD9081 copies the application parameters back to the user parameters area. This nominally takes 102 ms as shown in Figure 5-2.
    GUID-A1290672-E86A-4DD8-A974-20653CDA98C3-low.gifFigure 5-2 Power-Up Delay, With Parameter Change