SLVA528D September   2012  – August 2021 TPS65381-Q1 , TPS65381A-Q1

 

  1.   Trademarks
  2. 1Introduction
  3. 2Product Overview
    1. 2.1 Safety Functions and Diagnostics Overview
    2. 2.2 Target Applications
    3. 2.3 Product Safety Constraints
  4. 3Development Process for Management of Systematic Faults
    1. 3.1 TI New-Product Development Process
  5. 4TPS65381x-Q1 Product Architecture for Management of Random Faults
    1. 4.1 Device Operating States
    2.     Device Operating States (continued)
    3. 4.2 NRES (MCU Reset) Driver and ENDRV (SAFING Path Enable) Driver
  6. 5TPS65381x-Q1 Architecture Safety Mechanisms and Assumptions of Use
    1. 5.1 Power Supply
    2. 5.2 Regulated Supplies
      1. 5.2.1 VDD6 Buck Switch-Mode Supply
      2. 5.2.2 VDD5 Linear Supply
      3. 5.2.3 VDD3/5 Linear Supply
      4. 5.2.4 VDD1 Linear Supply
      5. 5.2.5 VSOUT1 Linear Supply
      6. 5.2.6 Charge Pump
    3. 5.3 Diagnostic, Monitoring, and Protection Functions
      1. 5.3.1 External MCU Fault Detection and Management
        1. 5.3.1.1 External MCU Error Signal Monitor (MCU ESM)
        2. 5.3.1.2 Watchdog Timer
      2. 5.3.2 Voltage Monitor (VMON)
      3. 5.3.3 Loss-of-Clock Monitor (LCMON)
      4. 5.3.4 Junction Temperature Monitoring and Current Limiting
      5. 5.3.5 Analog and Digital MUX (AMUX and DMUX) and Diagnostic Output Pin (DIAG_OUT)
      6. 5.3.6 Analog Built-In Self-Test (ABIST)
      7. 5.3.7 Logic Built-In Self-Test (LBIST)
      8. 5.3.8 Device Configuration Register Protection
  7. 6Application Diagrams
    1. 6.1 TPS65381x-Q1 With TMS570
    2. 6.2 TPS65381x-Q1 With C2000
    3. 6.3 TPS65381x-Q1 With TMS470
  8. 7TPS65381x-Q1 as Safety Element out of Context (SEooC)
    1. 7.1 TPS65381x-Q1 Used in an EV/HEV Inverter System
    2. 7.2 SPI Note
  9. 8Revision History

5.3.1.1 External MCU Error Signal Monitor (MCU ESM)

This block monitors the external MCU error conditions signaled to the TPS65381x-Q1 device on the ERROR/WDI input pin. The monitor has two configuration options for use with microcontrollers with dual-core lockstep (LS) or loosely coupled (LC) architectures:

  • TMS570 mode: Detecting a low pulse signal with programmable expected low pulse duration.
  • PWM mode: Detecting a PWM signal with programmable frequency and duty cycle.

The ERROR_CFG bit in the SAFETY_FUNC_CFG register controls the operating mode. The SAFETY_ERR_PWM_L register sets the expected low signaling duration for TMS570 mode and low pulse duration for PWM mode. The SAFETY_ERR_PWM_H register sets the expected PWM high pulse duration in PWM mode.

Logic BIST (LBIST) adds diagnostic coverage to the module. The MCU ESM can only be used when the watchdog is operated in Q & A mode.

GUID-E1CD8A47-574C-46DE-AB1A-3808D429DDDA-low.gifFigure 5-2 Error Detection Case Scenarios in TMS570 Mode
GUID-71AF5715-3DDE-4B2B-89AB-68270950E7F3-low.gifFigure 5-3 Error Detection Case Scenarios in PWM Mode