SLVA528D September   2012  – August 2021 TPS65381-Q1 , TPS65381A-Q1

 

  1.   Trademarks
  2. 1Introduction
  3. 2Product Overview
    1. 2.1 Safety Functions and Diagnostics Overview
    2. 2.2 Target Applications
    3. 2.3 Product Safety Constraints
  4. 3Development Process for Management of Systematic Faults
    1. 3.1 TI New-Product Development Process
  5. 4TPS65381x-Q1 Product Architecture for Management of Random Faults
    1. 4.1 Device Operating States
    2.     Device Operating States (continued)
    3. 4.2 NRES (MCU Reset) Driver and ENDRV (SAFING Path Enable) Driver
  6. 5TPS65381x-Q1 Architecture Safety Mechanisms and Assumptions of Use
    1. 5.1 Power Supply
    2. 5.2 Regulated Supplies
      1. 5.2.1 VDD6 Buck Switch-Mode Supply
      2. 5.2.2 VDD5 Linear Supply
      3. 5.2.3 VDD3/5 Linear Supply
      4. 5.2.4 VDD1 Linear Supply
      5. 5.2.5 VSOUT1 Linear Supply
      6. 5.2.6 Charge Pump
    3. 5.3 Diagnostic, Monitoring, and Protection Functions
      1. 5.3.1 External MCU Fault Detection and Management
        1. 5.3.1.1 External MCU Error Signal Monitor (MCU ESM)
        2. 5.3.1.2 Watchdog Timer
      2. 5.3.2 Voltage Monitor (VMON)
      3. 5.3.3 Loss-of-Clock Monitor (LCMON)
      4. 5.3.4 Junction Temperature Monitoring and Current Limiting
      5. 5.3.5 Analog and Digital MUX (AMUX and DMUX) and Diagnostic Output Pin (DIAG_OUT)
      6. 5.3.6 Analog Built-In Self-Test (ABIST)
      7. 5.3.7 Logic Built-In Self-Test (LBIST)
      8. 5.3.8 Device Configuration Register Protection
  7. 6Application Diagrams
    1. 6.1 TPS65381x-Q1 With TMS570
    2. 6.2 TPS65381x-Q1 With C2000
    3. 6.3 TPS65381x-Q1 With TMS470
  8. 7TPS65381x-Q1 as Safety Element out of Context (SEooC)
    1. 7.1 TPS65381x-Q1 Used in an EV/HEV Inverter System
    2. 7.2 SPI Note
  9. 8Revision History

5.3.4 Junction Temperature Monitoring and Current Limiting

Each regulated supply with an internal power FET has junction-temperature monitoring with thermal shutdown protection. Refer to the data sheet for details on the impact of an overtemperature event on the device state and status bits for each regulator.

The VDD6, VDD3/5, VDD5, and VSOUT1 regulators include a current-limit circuit for additional protection against excessive power consumption and thermal overstress. The detection of a current limit sets a status bit for the VDD3/5 (VDD3/5_ILIM bit) and VDD5 (VDD5_ILIM bit) regulators. The current limit for the VDD3/5, VDD5, and VSOUT1 regulators may also be monitored with the diagnostic MUX output using the digital MUX (DMUX) and DIAG_OUT pin. The DMUX signal names are VDD3/5_CL, VDD5_CL and VSOUT1_CL.

Note:

The VDD6 and VDD3/5 regulators share a junction-temperature monitor, but have independent current-limiting circuits.

In a typical application, the VDD1 linear regulator controller with external FET uses VDD6 as a preregulator and receives indirect current limit from the VDD6 current limit.

GUID-8F9C9880-5224-4FFC-B95F-B11D38EF1D94-low.gif
(1) Temperature sense elements are placed close to the power-FETs (PFETs) of the corresponding power supplies.
(2) VREF2P5 is monitored by VMON.
Figure 5-8 Temperature Monitoring