Figure 3-3 shows the circuit implementation of the active OLD in integrated drivers. The high-side FET of the OUT1 channel and low-side FET of the OUT2 are in the operating state. A reference voltage generator generates equivalent reference voltages for the OLD comparators' negative input terminals, while the positive terminals reflect the actual voltage in the FETs. As shown in Figure 3-3, the outputs of OL1_HS and OL2_LS are set to "1" when the output voltages (V_{OUT1_HS} and V_{OUT2_LS}) become greater than the reference voltage (V_{OL_REF}) of the comparators,

In this example, the reference-FET is any of the four FETs tied to the current reference sources (I_{OL_REF}). The V_{OL_REF} is determined by I_{OL_REF} and the on-state resistance of the reference-FET (R_{DS(ON)_REF}). Now, the V_{OUT1_HS} and the V_{OUT2_LS} are determined by the current and on-state resistances (R_DS(ON)) through the FETs that drive the load. When an OLD event occurs, the current through the FETs must be greater than the OLD current threshold. For these equations, the current through the FETs is called I_OL. Hence, by putting all of these parameters in Equation 14, the equation V_{OL_REF} equation is modified to,

Hence, the I_OLD can be calculated as,

Equation 16 shows that the OLD depends on the on-state resistance ratio of the reference-FETs to the FETs driving the load.

Putting the values of on-state resistance ratio (450:1) and the reference generator pull-down current (20 µA), the OLD current threshold can be calculated as,

Hence, if current through the load is greater than 9 mA while OLD is active, an OLD event is registered.

As for the circuit implementation in DRV8873, DRV8873-Q1 and the DRV824x-Q1 devices, Figure 3-4 shows the circuit implementation of the active OLD of DRV8873/DRV8873-Q1. For the OL1_HS comparator, if the drain-to-source voltage across the high-side driving FET is less than the V_{OL_HS} OLD threshold, OLD1_HS output is set to "1" and an OLD is detected. For the OL2_HS comparator, if the body diode voltage (V_D) is less than the V_{OL_HS} OLD threshold, OLD2_HS output is set to "1" and an OLD is detected. Due to the current re-circulation through the body diode (I_OL), the body diode voltage (V_D) depends on I_OUTX for an OLD to occur.

There is a dependency on the operating conditions and on external circuitry, such as the output capacitors, that can cause an OLD to be reported even though the load is present. This case might occur during a direction change or for small load currents respectively small PWM duty cycles.

Figure 3-5 shows the circuit implementation for the active OLD of DRV824x-Q1. Device can detect an open load detection in the ACTIVE state during high-side recirculation. This includes high-side load connected directly to VM or through a high-side FET on the other half-bridge. During a PWM switching transition, the inductive load current re-circulates into VM through the HS body diode when the LS FET is turned OFF. The device looks for a voltage spike on OUTx above VM during the brief dead time, before the HS FET is turned ON. To observe the voltage spike, this load current needs to be higher than the pull down current (IPD_OLA) on the output asserted by the FET driver. Absence of this voltage spike for "3" consecutive re-circulation switching cycles indicates a loss of load inductance or increase in load resistance and is detected as an active open detection fault.

Finally, when using active OLD in gate drivers, capacitors must be placed between the load phase nodes and GND. These capacitor are required for BLDC motors and both bi-directional and unidirectional BDC motors at the phase nodes. If a solenoid load is connected, the capacitors are not required. Capacitors must be sized as:

Where V_TH is the threshold voltage of the FETs and V_OLA(min) in the DRV8343-Q1 and DRV8340-Q1 is 150 mV. The values of the FET C_rss and C_oss should be used for 0 V V_DS. Derating of C_phase must be considered when selecting the capacitance.