SLVAEL7A December 2019 – August 2024 TPS7B7701-Q1 , TPS7B7702-Q1
This section provides a failure mode analysis (FMA) for the pins of the TPS7B770x-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:
Table 4-6 through Table 4-9 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.
Class | Failure Effects |
---|---|
A | Potential device damage that affects functionality. |
B | No device damage, but loss of functionality. |
C | No device damage, but performance degradation. |
D | No device damage, no impact to functionality or performance. |
Figure 4-1 and Figure 4-2 show the TPS7B770x-Q1 pin diagram. For a detailed description of the device pins, see the Pin Configuration and Functions section in the TPS7B770x-Q1 data sheet.