SLVAER7A may   2020  – april 2023 TPS7B4254-Q1

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)
  6. 5Revision History

Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the TPS7B4254-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

  • Pin short-circuited to ground (see Table 4-2)
  • Pin open-circuited (see Table 4-3)
  • Pin short-circuited to an adjacent pin (see Table 4-4)
  • Pin short-circuited to VIN (see Table 4-5)

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
Class Failure Effects
A Potential device damage that affects functionality.
B No device damage, but loss of functionality.
C No device damage, but performance degradation.
D No device damage, no impact to functionality or performance.

Figure 4-1 shows the TPS7B4254-Q1 pin diagram. For a detailed description of the device pins, see the Pin Configuration and Functions section in the TPS7B4254-Q1 data sheet.

GUID-1C1C901D-C7FA-4D93-A2AE-5FBC99D952C5-low.svg Figure 4-1 Pin Diagram
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin Name Pin No. Description of Potential Failure Effects Failure Effect Class
OUT 1 Output voltage is near or at ground. The device is in current limit and can cycle in and out of thermal shutdown depending on power dissipation. B
NC 2 No effect. Normal operation. D
GND 3 No effect. Normal operation. D
FB 4 VOUT is equal to VIN minus dropout because the pass transistor is driven to the rail. B
ADJ 5 The low-dropout regulator (LDO) does not start up because ADJ is grounded. B
GND 6 No effect. Normal operation. D
NC 7 No effect. Normal operation. D
IN 8 The output is near or at ground. B
Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin Name Pin No. Description of Potential Failure Effects Failure Effect Class
OUT 1 The load is longer regulated. B
NC 2 No effect. Normal operation. D
GND 3 The device is operational as long as pin 6 (GND) is still connected, but with degraded performance. B
FB 4 The output becomes unregulated. B
ADJ 5 The device state is unknown. The device is either on and regulated to an unknown voltage, or the device is off. B
GND 6 The device is operational as long as pin 6 (GND) is still connected, but with degraded performance. B
NC 7 No effect. Normal operation. D
IN 8 The device does not operate or start up. B
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin Name Pin No. Shorted to Description of Potential Failure Effects Failure Effect Class
OUT 1 NC (pin 2) No effect. Normal operation. D
NC 2 GND (pin 3) No effect. Normal operation. D
GND 3 FB (pin 4) The output is equal to the input minus dropout because the pass transistor is driven to the rail. B
ADJ 5 GND (pin 6) The LDO does not start up because ADJ is grounded. B
GND 6 NC (pin 7) No effect. Normal operation. D
NC 7 IN (pin 8) No effect. Normal operation. D
Table 4-5 Pin FMA for Device Pins Short-Circuited to VIN
Pin Name Pin No. Description of Potential Failure Effects Failure Effect Class
OUT 1 No output regulation. The output voltage is the same as the input voltage. B
NC 2 No effect. Normal operation. D
GND 3 No output regulation. The output is near or at ground. B
FB 4 FB is damaged if VIN exceeds the FB maximum rated voltage. Otherwise, the pass transistor is off and the output is low. A/B
ADJ 5 The LDO starts up or shuts down when VIN is above the ADJ threshold. The output equals the input minus the dropout voltage. B
GND 6 No output regulation. The output is near or at ground. B
NC 7 No effect. Normal operation. D
IN 8 No effect. Normal operation. D