SLVAEV4 June 2020 DRV8876-Q1
4.1 HTSSOP Package
Figure 4-1 shows the DRV8876-Q1 pin diagram. For a detailed description of the device pins please refer to the 'Pin Configuration and Functions' section in the DRV8876-Q1 datasheet.
Figure 4-1 DRV8876-Q1 Pin DiagramFollowing are the assumptions of use and the device configuration assumed for the pin FMA in this section:
- The device is used with external components consistent with the values described in the external component table of the datasheet.
Table 4-2 HW variant - Pin FMA for Device Pins Short-Circuited to Ground
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| EN/IN1 | 1 | OUTx driver control will be lost | B |
| PH/IN2 | 2 | OUTx driver control will be lost | B |
| nSLEEP | 3 | Device will be in sleep state with OUTx HiZ | B |
| nFAULT | 4 | Device will always be signaling fault | B |
| VREF | 5 | Sets current regulation limit ITRIP = 0 A | B |
| IPROPI | 6 | Current sensing and regulation capability will be lost | B |
| IMODE | 7 | Device IMODE configuration may be misinterpreted | B |
| OUT1 | 8 | OUTx HiZ, with device signaling fault | B |
| PGND | 9 | Intended operation | D |
| OUT2 | 10 | OUTx HiZ, with device signaling fault | B |
| VM | 11 | Device will not power up | B |
| VCP | 12 | Device will be damaged with higher current draw from VM | A |
| CPH | 13 | Device will be damaged with higher current draw from VM | A |
| CPL | 14 | Device will be damaged with higher current draw from VM | A |
| GND | 15 | Intended operation | D |
| PMODE | 16 | Device PMODE configuration may be misinterpreted | B |
Table 4-3 HW variant - Pin FMA for Device Pins Open-Circuited
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| EN/IN1 | 1 | OUTx driver control will be lost | B |
| PH/IN2 | 2 | OUTx driver control will be lost | B |
| nSLEEP | 3 | Device will be in sleep state with OUTx HiZ | B |
| nFAULT | 4 | Fault signaling will be lost | B |
| VREF | 5 | Undefined ITRIP current | B |
| IPROPI | 6 | Current sensing and regulation capability will be lost | B |
| IMODE | 7 | Device IMODE configuration may be misinterpreted | B |
| OUT1 | 8 | OUTx impedance will be higher - device will not be able to drive the load properly | B |
| PGND | 9 | Device will not power up | B |
| OUT2 | 10 | OUTx impedance will be higher - device will not be able to drive the load properly | B |
| VM | 11 | Device will not power up | B |
| VCP | 12 | Charge pump unstable, possible damage to charge pump | A |
| CPH | 13 | OUTx HiZ, with device signaling fault | B |
| CPL | 14 | OUTx HiZ, with device signaling fault | B |
| GND | 15 | Device will not power up | B |
| PMODE | 16 | Device PMODE configuration may be misinterpreted | B |
Table 4-4 HW variant - Pin FMA for Device Pins Shorted to Adjacent Pin
| Pin Name | Pin No. | Shorted to Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|---|
| EN/IN1 | 1 | 2 | OUTx driver control will be lost | B |
| PH/IN2 | 2 | 3 | OUTx driver control will be lost | B |
| nSLEEP | 3 | 4 | Device will go into sleep state whenever nFAULT is asserted low, device damage may occur if nFAULT sinks excess current from nSLEEP signal | A |
| nFAULT | 4 | 5 | Device damage may occur if nFAULT sinks excess current from VREF signal | A |
| VREF | 5 | 6 | Current regulation capability will be lost, OUTx driver control will be lost | B |
| IPROPI | 6 | 7 | Current sensing and regulation capability will be lost | B |
| IMODE | 7 | 8 | Device will be damaged with higher current draw from VM | A |
| OUT1 | 8 | 9 | OUTx HiZ with device signaling fault | B |
| PGND | 9 | 10 | OUTx HiZ with device signaling fault | B |
| OUT2 | 10 | 11 | OUTx HiZ with device signaling fault | B |
| VM | 11 | 12 | OUTx HiZ with device signaling fault | B |
| VCP | 12 | 13 | Device will be damaged with higher current draw from VM | A |
| CPH | 13 | 14 | Device will be damaged with higher current draw from VM | A |
| CPL | 14 | 15 | Device will be damaged with higher current draw from VM | A |
| GND | 15 | 16 | Device PMODE configuration may be misinterpreted | B |
| PMODE | 16 | 1 | OUTx driver control will be lost | B |
Table 4-5 HW variant - Pin FMA for Device Pins Shorted to VM (High Voltage Supply)
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| EN/IN1 | 1 | Device will be damaged with higher current draw from VM | A |
| PH/IN2 | 2 | Device will be damaged with higher current draw from VM | A |
| nSLEEP | 3 | Device will be damaged with higher current draw from VM | A |
| nFAULT | 4 | Device will be damaged with higher current draw from VM | A |
| VREF | 5 | Device will be damaged with higher current draw from VM | A |
| IPROPI | 6 | Device will be damaged with higher current draw from VM | A |
| IMODE | 7 | Device will be damaged with higher current draw from VM | A |
| OUT1 | 8 | OUTx HiZ with device signaling fault | B |
| PGND | 9 | Device will not power up | B |
| OUT2 | 10 | OUTx HiZ with device signaling fault | B |
| VM | 11 | Intended operation | D |
| VCP | 12 | OUTx HiZ with device signaling fault | B |
| CPH | 13 | Device will be damaged with higher current draw from VM | A |
| CPL | 14 | Device will be damaged with higher current draw from VM | A |
| GND | 15 | Device will not power up | B |
| PMODE | 16 | Device will be damaged with higher current draw from VM | A |