SLVAF11 June   2021 TPS51397A , TPS566231 , TPS566235 , TPS566238 , TPS568230

 

  1.   Trademarks
  2. 1Introduction
  3. 2Open Loop Frequency Response of D-CAP2 and D-CAP3 Converter
  4. 3Method to Choose LC Value for Loop Stability
    1. 3.1 Limits of Output Capacitance
    2. 3.2 Phase Margin Estimation Method
  5. 4Example of LC Design Method for D-CAP3 Converter
  6. 5Simulation and Experimental Verification
  7. 6Summary
  8. 7References
  9. 8Appendix A

Phase Margin Estimation Method

A phase margin estimation method is proposed in this section to help evaluating the components chosen with the method in previous section.

Based on the phase characteristics of poles and zeros, it can be derived that the phase of double poles, ripple injection zero, ESR zero and delay factor are as Equation 16 through Equation 19 at crossover frequency.

Equation 16. GUID-20210220-CA0I-2CX4-BD7G-D1XZ5FWMQZTW-low.gif
Equation 17.
Equation 18.
Equation 19. GUID-20210220-CA0I-HFMF-BBTM-TC2LML25JXVP-low.gif

For D-CAP control schemes, the initial phase before double poles frequency is about 180 degree. Then we can calculate the phase margin:

Equation 20. GUID-20210220-CA0I-CGXQ-XN8P-4Q9VFKQRHSGL-low.gif

If the components chosen can’t ensure enough phase margin with Equation 20, it’s recommended to recheck the calculated limits and reselect the capacitance. Basically, if the estimated crossover frequency is closer to 1/3 of crossover frequency, select larger capacitance. Otherwise select smaller capacitance.

The application design method and evaluation method above are only the reference for output capacitance choose. It needs to be verified with bench test due to the effects of parasitic parameters and some non-ideal situation.