SLVAFE7 September 2022 LM51551
Adjustable outputs can meet the requirement from different customers and make it easy to power the transmitter since the design may need several voltage rails. In this design, a signal (0 V to 2.5 V) from FPGA is used to control the output voltage by comparing the feedback voltage captured from the positive output. The output of the op amp is connected to the FB pin of the LM51551 device to regulate the VOUT.
Figure 2-5 shows the diagram of the voltage control circuit. To select the proper value of R18, R19, R20, R21, R22, and R26, see the following equations.
where
For example, the following equations show that if kFB = 1.5 , desired control voltage is 0 V to 2.5 V and the output voltage is 15 V to 75 V: