SLVAFF7A december   2022  – august 2023 TPS25762-Q1 , TPS25772-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Purpose and Scope
  5. 2Firmware Boot Code Brief
  6. 3Patch Bundle Brief
  7. 4Firmware Update
    1. 4.1 Overview
    2. 4.2 EEPROM Firmware Update
      1. 4.2.1 EEPROM Memory Organization
      2. 4.2.2 EEPROM Update - 4CC Task Command Set
      3. 4.2.3 EEPROM Patch Bundle Update Process
    3. 4.3 PD Controller Patch Bundle Download
      1. 4.3.1 Patch Bundle Download - 4CC Task Command Set
      2. 4.3.2 Burst Mode Patch Download Process
  8.   Appendix A: TVSP Boot Configuration Settings
  9.   Appendix B: Using 4CC Commands
  10.   Revision History

Appendix A: TVSP Boot Configuration Settings

GUID-20221129-SS0I-SZPC-KRFL-GVN3JZ8WGSM2-low.svg Figure A-1 TVSP Setting

TVSP pin is a multi-function pin, but for boot process, RTVSP is the resistor determining the boot behavior. At power on, the resistance between the TVSP pin and PGND determines the boot method, USB PD port I2C addresses and I2C logic thresholds. Refer to RTVSP Configuration Settings. The pin hardware connection is shown in Figure 5-1. During device initialization and boot, typically within 4 seconds after power on, VIN must be above 7.6 V to ensure proper bias of the TVSP pin to 5.5 V. Once boot is complete the device can operate over the full VIN range. Table 5-1 below are the settings of RTVSP. More details on the TVSP pin can be found in the datasheet.

Table A-1 TVSP Setup
RTVSP(kΩ) TVSP Index ADC Value I2C Slave PortAddresses (A|B) I2C Logic (VDD) Boot Mode
Open 0 ≤ 10(0×0A) 0×22|0×26 3.3 V EEPROM
93.1 1 ≤ 24(0×18) 0×23|0×27 3.3 V External HUB|MCU
47.5 2 ≤ 42(0×2A) 0×22|0×26 1.8 V EEPROM
29.4 3 ≤ 63(0×3F) 0×23|0×27 1.8 V External HUB|MCU
20.0 4 ≤ 89(0×59) 0×23|0×27 3.3 V EEPROM
14.7 5 ≤ 119(0×77) 0×22|0×26 3.3 V External HUB|MCU
11.0 6 ≤ 156(0×9C) 0×23|0×27 1.8 V EEPROM
8.45 7 ≤ 201(0×C9) 0×22|0×26 1.8 V External HUB|MCU
6.65 8 ≤ 255(0×FF) 0×22|0×26 3.3 V USB Endpoint