SLVAFF7B December   2022  – November 2024 TPS25762-Q1 , TPS25763-Q1 , TPS25772-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Purpose and Scope
  5. 2Firmware Boot Code Brief
  6. 3Patch Bundle Brief
  7. 4Firmware Update
    1. 4.1 Overview
    2. 4.2 EEPROM Firmware Update
      1. 4.2.1 EEPROM Memory Organization
      2. 4.2.2 EEPROM Update - 4CC Task Command Set
      3. 4.2.3 EEPROM Patch Bundle Update Process
    3. 4.3 PD Controller Patch Bundle Download
      1. 4.3.1 Patch Bundle Download - 4CC Task Command Set
      2. 4.3.2 Burst Mode Patch Download Process
  8.   Appendix A: TVSP Boot Configuration Settings
  9.   Appendix B: Using 4CC Commands
  10.   Revision History

Appendix A: TVSP Boot Configuration Settings

TVSP Setting Figure A-1 TVSP Setting

The TVSP pin is a mufti-function pin, but for boot process, RTVSP is the resistor determining the boot behavior. The pin hardware connection is shown in Figure 5-1. For more details, see the RTVSP Configuration Settings in the device-specific data sheet.

At power on, the resistance between the TVSP pin and PGND determines the boot method, USB PD port I2C addresses and I2C logic thresholds. During device initialization and boot, typically within 4 seconds after power on, VIN must be above 7.6V to ensure proper bias of the TVSP pin to 5.5V. Once boot is complete the device can operate over the full VIN range.