SLVAFI8 February   2023 TLC6C5748-Q1

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2Design Considerations for Low EMI
    1. 2.1 Design Considerations Overview
    2. 2.2 Considerations in Detail
      1. 2.2.1 Top-Level Architecture
      2. 2.2.2 High Frequency Signals
        1. 2.2.2.1  Original Setup
        2. 2.2.2.2  3.3 V I/O Voltage Instead of 5 V
        3. 2.2.2.3  Use Independent OSC for GSCLK With Spread Spectrum
        4. 2.2.2.4  Without Using Buffer on GSCLK
        5. 2.2.2.5  Using Snubber on GSCLK
        6. 2.2.2.6  Lower the Signal Frequency
        7. 2.2.2.7  Placement and PCB layout
        8. 2.2.2.8  ESD Enhancement
        9. 2.2.2.9  Demo and Test Results
        10. 2.2.2.10 Bench Test Results
  5. 3Summary
  6. 4References

Bench Test Results

After adding countermeasures, checking if the signal integrity is essential, especially GSCLK. Sometimes, GSCLK waveform was affected when adding snubber. Per the data sheet, it should be checked whether GSCLK meet the chip criteria high/low pulse larger than 10us. For the TLC6C5748-Q1 structure, checking first TLC6C5748-Q1 and last TLC6C5748-Q1 GSCLK pin to confirm whether meeting the data sheet.

GUID-6343EC26-7811-4E4B-94DC-1DCDA2C0777C-low.jpg Figure 2-13 First TLC6C5748-Q1 GSCLK Waveform
GUID-335D8D34-C466-4127-8897-5328915A50F8-low.jpg Figure 2-14 Last TLC6C5748-Q1 GSCLK Waveform