SLVAFK3 june   2023 AM2431 , AM2432 , AM2434 , TPS65219

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2TPS65219 Overview
    1. 2.1 TPS65219 Functional Block Diagram
  6. 3TPS65219 Variants
  7. 4TPS6521904 Powering AM243x
    1. 4.1 TPS6521907 Powering AM243x
    2. 4.2 TPS6521908 Powering AM243x
  8. 5References

TPS6521907 Powering AM243x

Use case: VSYS=5V, DDR4 Memory

Figure 4-4 shows the TPS6521907 variant powering the AM243x microcontroller on a system with 5 V input supply and DDR4 memory. The 5 V coming from the pre-regulator is connected to the main input supply for reference system (VSYS) and to the power input of the buck converters (PVIN_Bx). Buck1, Buck2 and Buck3 are used to supply VDD_CORE at 0.85 V, 3.3 V VDDSHVx IO and DDR IO respectively. Since Buck2 (3.3 V PMIC rail) is programmed to ramp up first in the power-up sequence, it can be used as the input supply for some of the LDOs to minimize power dissipation. LDO3 supports the 1.8 V analog domain and LDO4 supports the 2.5 V VPP for the DDR4 memory. This power solution requires an external discrete buck regulator to supply the 1.8 V VDDSHV IO domain. This external discrete can be enabled using the GPO1 of the PMIC. TPS6521901 comes pre-programmed to enable GPO1 in the second slot of the power-up sequence with a duration of 10 ms. The external discrete must ramp up and reach a stable output voltage within the 10 ms duration of the second slot (before the PMIC starts the 3rd slot of the power-up sequence).

LDO1 and LDO2 are free power resources that can be used for external peripherals, such as 3.3-V rail required for I/Os. LDO1, configured as bypass, allows dynamic changes between 3.3 V and 1.8 V. This voltage change on LDO1 can be triggered by I2C or by setting the VSEL_SD pin high (LDO1=3.3 V) or low (LDO1=1.8 V). The remaining two general purpose pins (GPIO and GPO2) are free digital resources that are disabled by default but can be enabled through I2C after the PMIC completes the power-up sequence. TPS6521907 comes pre-programmed, but maintains user-programmable functionality as a NVM device that allows full customization of the output voltages, sequencing, GPIO control, and more to best meet system needs. Figure 4-5 and Figure 4-6 shows the power-up and power-down sequence programmed on TPS6521907.

GUID-20230621-SS0I-P0N1-HSQB-LQ48NZD2MZXL-low.svg Figure 4-4 TPS6521907 Powering AM243x
GUID-20230621-SS0I-FQFX-1GDL-B77G3RRWS8GV-low.svgFigure 4-5 TPS6521907 Power-Up Sequence
GUID-20230621-SS0I-SK93-PLCV-LPPFPQZRJSNF-low.svgFigure 4-6 TPS6521907 Power-Down Sequence