The value of dummy resistor has impact on both output discharge time and maximum discharge current.

Considering the worst case, when the system is disabled, the load current is 0 A, then the output discharge time is calculated by:

where

• R_Dummy is the dummy resistor
• R_FET is the Rds_on of open drain NMOS in PG pin, generally this is much smaller than dummy resistor, so can be ignored.
• C_OUT is the output capacitance.
• r is the ratio of the discharge terminal voltage (V_TERMI) to nominal output voltage (V_OUT).

One thing needed to be noted that, if engineer uses aluminum electrolytic capacitor or tantalum capacitor, the C_OUT is the nominal capacitance, but if engineer uses ceramic capacitors, take care when evaluating the derating of a ceramic capacitor under dc bias voltage, the dc bias voltage can significantly reduce the effective capacitance. For example, for a 22 uF/10 V/0603 package ceramic capacitor, when dc bias is 5 V the effective capacitance is only about 5.5 uF. Therefore when using ceramic capacitors, we recommend to use the average value of nominal capacitance and effective capacitance when estimating the discharge time.

For example, when using two 22 uF/10 V/0603 package ceramic capacitors, we get C_OUT = 27.5 uF, if system requires the supply voltage needs to discharge to 20% nominal voltage (r = 0.2) within 50 ms, then

So the maximum Rdummy resistor is 1.11k Ω.

Figure 3-3 shows a comparison between calculation discharging time and test discharge time (based on C_OUT = 27.5 uF, r = 0.2 condition).

The maximum discharge current is calculated below. Engineer needs to make sure that this maximum current does not exceed 50 mA to avoid possible damage to internal open drain NMOS.