2 Power Good Indicator

The power good signal is generated by a power supply when the supply voltage has reached target voltage and been stable. The most of electronic circuits or components can only operate normally when the supply voltage is within a certain range, if the supply voltage is out of this range, those circuits and components can't operate properly and even be damaged.

In this condition, a power good signal is used to make sure that all the supply voltages are always stable. A MCU or other kind of processors can be designed to monitor the power good signal. Only the supply voltage reaches proper voltage and is stable, the power good signal is generated and inform the processor that supply voltage is normal and can be supplied to other circuits and components. Once a failure power situation is detected, this signal can also inform processor immediately so that the processor can reset or stop operating.

For those power supply devices that doesn’t have power good signal, engineer needs to use comparators or ADCs to achieve this function. TPS61033 integrates a power good indicator to simplify sequencing and supervision. The power-good output consists of an open-drain NMOS, requiring an external pullup resistor connect to a stable voltage supply.

The PG indicator of TPS61033 is controlled by output voltage or enable. The PG pin goes high with a typical 1.3 ms delay time after VOUT is between 93% (typical) and 107% (typical) of the target output voltage. When the output voltage is out of the target output voltage window, the PG pin immediately goes low with a 33 μs deglitch filter delay. This deglitch filter also prevents any false pull-down of the PGOOD due to transients. When EN is pulled low, the PG pin is also forced low with a 33 μs deglitch filter delay.