SLVAFQ2 December 2023 TPS65219
This section describes the configuration of the TPS652190C and LP87334F digital pins.
Pin Name | Function | Polarity/Operation | |
---|---|---|---|
Inputs | VSEL_SD | Sets LDO1 output voltage |
Low: LDO1 = 3.3V (requires PVIN_LDO1=3.3V) High: LDO1 = 1.8V |
MODE/STBY | Selects switching mode |
Low: Bucks operate in auto-PFM High: Bucks operate in forced-PWM |
|
MODE/RESET | COLD reset |
High: normal operation Falling edge: COLD reset |
|
EN/PB/VSENSE | PMIC enable |
Low: PMIC OFF (Initilize State) High: PMIC ON |
|
Outputs (open-drain) |
nRSTOUT |
Reset output (open-drain) |
Goes high at the end of the PMIC power-up sequence. Can be used to drive POR_B |
nINT | Reset output |
High: normal operation Low: interrupt fault detected |
|
GPIO | Enables secondary PMIC (LP87334F) | Enabled by default, part of the PMIC sequence. Refer to power-up/power-down timing diagram. | |
GPO1 | General purpose output | Enabled by default, part of the PMIC sequence. Refer to power-up/power-down timing diagram. | |
GPO2 | Enables external 3.3V power switch | Enabled by default, part of the PMIC sequence. Refer to power-up/power-down timing diagram. | |
I2C | SCL | I2C clock | NA |
SDA | I2C data | NA |
Pin Name | Function | Polarity/Operation | |
---|---|---|---|
Inputs | EN | PMIC enable pin |
Low: PMIC OFF High: PMIC ON |
Outputs (open-drain) |
PGOOD | configured in continuous mode | see section "7.3.8.1.2 PGOOD Pin Continuous Mode" in LP8733 data sheet |
GPO | general-purpose digital output | Enabled by default, part of the PMIC sequence. Refer to power-up/power-down timing diagram. | |
nINT | interrupt output |
High: normal operation Low: interrupt fault detected |
|
CLKIN/GPO2 | general-purpose digital output | Enabled by default, part of the PMIC sequence. Refer to power-up/power-down timing diagram. | |
I2C | SCL | I2C clock | NA |
SDA | I2C data | NA |