SLVAFV8 July   2024 TPS25751

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 ADCINX Setting
  6. 3 Unique Address Interface Protocol
  7. 4 PTCH Mode to APP Mode
    1. 4.1 Step of PTCH Mode to APP Mode
    2. 4.2 Step of Generating Low Region Binary
  8. 5 Dead Battery Configurations
  9. 6 Interrupt Event, Mask, Clear for I2Ct IRQ
  10. 7 GPIOx Function
  11. 8 4CC Command
  12. 9 Summary
  13. 10References

3 Unique Address Interface Protocol

The Unique Address Interface allows for complex interactions between an I2C controller and a single PD Controller. The I2C target unique address is used to receive or respond to Host Interface protocol commands. Figure 3-1 and Figure 3-2 show the write and read protocols, respectively. The Byte Count used during a register write can be longer than the number of bytes actually written, in other words the controller can issue the stop bit without writing N bytes. Similarly, during a register read, the controller can issue the stop bit before reading all N bytes. N bytes refers to the number of bytes to be read or written.

I2C Unique Address Write Register Protocol Figure 3-1 I2C Unique Address Write Register Protocol
I2C Unique Address Read Register Protocol Figure 3-2 I2C Unique Address Read Register Protocol