SLVAFW1 August   2024 DRV8818

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Method A: Reducing VREF Manually
    1. 2.1 Experiment and Results
  6. 3Method B: Standstill Power Saving Mode
    1. 3.1 Experiment and Results
  7. 4Summary
  8. 5References

2.1 Experiment and Results

A set up was created in the lab using a DRV8818EVM and a function generator. The block diagram is shown in Figure 2-1. The function generator is used to provide a periodic voltage signal to the VREF pin with different duty cycles. The diodes prevent reverse current flow into the MCU from the function generator.

Block Diagram of Manual VREF Reduction Method Figure 2-1 Block Diagram of Manual VREF Reduction Method
Table 2-1 summarizes the test conditions. A graphical depiction of the results is shown in Figure 2-2. Please note that 100% duty refers to the condition where a stepper motor is run constantly with a peak current value set by VREF.
Table 2-1 Test Conditions for Manual VREF Reduction Method
Parameter Value
VM 24V
Mode Mixed Decay
Speed 1000 pps
Run time 5 mins
Temperature Rise While PWM-ing VREF Figure 2-2 Temperature Rise While PWM-ing VREF

Thus, the manual VREF reduction method reduces power consumption and improves thermals. Furthermore, this method also allows an increased value of motor peak regulated current without hitting the thermal shutdown (TSD) temperature value.

An example waveform is shown in Figure 2-3 where the blue signal denotes the periodic VREF voltage, green signal denotes the motor current, and yellow signal denotes the step signals.

Example Waveform Figure 2-3 Example Waveform