SLVK172 June   2024 TPS7H3014-SP

 

  1.   1
  2.   TPS7H3014-SP Single-Event Effects (SEE)
  3.   Trademarks
  4. Introduction
  5. Single-Event Effects (SEE)
  6. Device and Test Board Information
  7. Irradiation Facility and Setup
  8. Depth, Range, and LETEFF Calculation
  9. Test Setup and Procedures
  10. Destructive Single-Event Effects (DSEE)
    1. 7.1 Single-Event Latch-Up (SEL) Results
    2. 7.2 Single-Event Burnout (SEB) and Single-Event Gate Rupture (SEGR) Results
  11. Single-Event Transients (SET)
  12. Event Rate Calculations
  13. 10Summary
  14.   A References

Device and Test Board Information

The TPS7H3014-SP is packaged in a 22-pin CFP-HFT ceramic package as shown in Figure 3-1. The TPS7H3014-SP evaluation module was used to evaluate the performance and characteristics of the TPS7H3014-SP under heavy ion radiation. The TPS7H3014EVM-CVAL (Evaluation Module) is shown in Figure 3-2. The actual EVM BOM was modified from the original (or default). The board was configured to be dual-site rather than in daisy-chain. This means both samples on a given board were configured under the same conditions (or configuration). Three different configurations were used during the heavy-ions test campaign, the details are provided on Figure 3-3, Figure 3-4, and Figure 3-5.

TPS7H3014-SP Photograph of Delidded TPS7H3014-SP [Left] and Pinout Diagram [Right]Figure 3-1 Photograph of Delidded TPS7H3014-SP [Left] and Pinout Diagram [Right]
Note: The package was delidded to reveal the die face for all heavy-ion testing.
TPS7H3014-SP TPS7H3014-SP EVM Top ViewFigure 3-2 TPS7H3014-SP EVM Top View
TPS7H3014-SP TPS7H3014-SP EVM Schematic for DSEE TestingFigure 3-3 TPS7H3014-SP EVM Schematic for DSEE Testing
TPS7H3014-SP TPS7H3014-SP EVM Schematic for SET TestingFigure 3-4 TPS7H3014-SP EVM Schematic for SET Testing
TPS7H3014-SP TPS7H3014-SP EVM for Worst-Case SET TestingFigure 3-5 TPS7H3014-SP EVM for Worst-Case SET Testing