SLVS332J March   2001  – December 2016 TPS797

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Regulator Protection
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Powering Microcontrollers
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 External Capacitor Requirements
        3. 8.2.1.3 Application Curves
  9. 9 Power-Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Power Dissipation and Junction Temperature
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
Voltage Input voltage(2) –0.3 6 V
Maximum dc output voltage 4.9 V
Current Peak output current Internally limited A
Temperature Operating virtual junction temperature, TJ –40 85 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground pin.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VI Input voltage 1.8 5.5 V
VO Output voltage 1.8 3.3 V
IO Output current 0 50 mA
CI Input capacitor 0 0.1 µF
CO Output capacitor 0.47 1 µF
TJ Junction temperature –40 85 °C

6.4 Thermal Information

THERMAL METRIC(1) TPS797xx UNIT
DCK (SC70)
5 PINS
RθJA Junction-to-ambient thermal resistance 230.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 98.3 °C/W
RθJB Junction-to-board thermal resistance 70.7 °C/W
ψJT Junction-to-top characterization parameter 3.9 °C/W
ψJB Junction-to-board characterization parameter 70.1 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance — °C/W
(1) For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics (SPRA953).

6.5 Electrical Characteristics

over operating temperature range TJ = –40°C to 85°C, typical values are at TA = 25°C, VI = VO (typ) + 0.5 V or 2 V (whichever is greater); IO = 0.5 mA, VSET, VEN = VI, and CO = 1 µF (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VI Input voltage(1) IO = 3 mA 1.8 5.5 V
IO = 10 mA 2 5.5
IO Continuous output current(2) 0 50 mA
VO Output voltage accuracy(3) VO + 1 V ≤ VI ≤ 5.5 V
1 mA < IO < 10 mA		 –4% 4%
ΔVO(ΔVI) Line regulation(3) VO + 1 V ≤ VI ≤ 5.5 V 0.15% V
ΔVO(ΔIO) Load regulation 1 µA < IO < 10 mA 5% A
V(DO) Dropout voltage(4), IO = 10 mA
VI = VO(NOM) – 0.1 V		 TPS79730 110 200 mV
TPS79733 105 200
ISC Output current limit VO = 0 V 190 300 mA
I(GND) Ground pin current(3) IO = 10 mA 1.2 2 µA
PSRR Power-supply rejection ratio
(ripple rejection)		 f = 100 Hz, CO = 10 µF,
IO = 10 mA		 50 dB
Vn Output noise voltage (TPS79718) BW = 200 kHz to 100 kHz,
CO = 10 µF, IO = 10 mA		 600 µVRMS
VImin(PG) Minimum input voltage for valid PG V(PG) ≥ 0.8 V, IPG = 100 µA 1.2 V
VIT PG trip threshold voltage VOUT increasing 90% VOUT
VOL(PG) PG output low voltage VI = 1.4 V, IPG = 30 µA, IO = 1 mA 0.14 0.225 V
Ilkg(PG) PG leakage current V(PG) = 5 V, VI = VO + 1 V,
IO = 1 mA		 0.1 nA
(1) Minimum VI = VO + V(DO) or the minimum value specified here, whichever is greater.
(2) Continuous output current is limited by internal protection circuitry, but it is not recommended that the device operate above this maximum for extended periods of time.
(3) Minimum VI is specified in (1).
(4) V(DO) is not measured for the TPS79718 because minimum VI > 1.7 V.
TPS79718 TPS797285 TPS79730 TPS79733 timing_lvs332.gif Figure 1. TPS797xx PG Timing Diagram

6.6 Typical Characteristics

over operating temperature range TJ = –40°C to 85°C, typical values are at TA = 25°C, VI = VO (typical) + 0.5 V or 2 V (whichever is greater); IO = 0.5 mA, VEN = VI, and CO = 1 µF (unless otherwise noted).
TPS79718 TPS797285 TPS79730 TPS79733 tc_vo_v_io_43v_lvs332.gif
Figure 2. Output Voltage vs Output Current
TPS79718 TPS797285 TPS79730 TPS79733 tc_vo_v_free_43v_lvs332.gif
Figure 4. Output Voltage vs Junction Temperature
TPS79718 TPS797285 TPS79730 TPS79733 tc_gnd_v_free_lvs332.gif
Figure 6. Ground Current vs Junction Temperature
TPS79718 TPS797285 TPS79730 TPS79733 tc_outp_imp_v_freq_lvs332.gif
Figure 8. Output Impedance vs Frequency
TPS79718 TPS797285 TPS79730 TPS79733 tc_load_79718_lvs332.gif
Figure 10. TPS79718 Load Transient Response
TPS79718 TPS797285 TPS79730 TPS79733 tc_vo_v_io_28v_lvs332.gif
Figure 3. Output Voltage vs Output Current
TPS79718 TPS797285 TPS79730 TPS79733 tc_vo_v_free_28v_lvs332.gif
Figure 5. Output Voltage vs Junction Temperature
TPS79718 TPS797285 TPS79730 TPS79733 tc_outp_snd_v_freq_lvs332.gif
Figure 7. Output Spectral Noise Density vs Frequency
TPS79718 TPS797285 TPS79730 TPS79733 tc_drop_v_free_lvs332.gif
Figure 9. Dropout Voltage vs Junction Temperature